/***********************************************************************
*      File name   :  FtI2Stest_out_normal.c. 
*      Date        :  2006/01/24.
*      Author      :  grace.zhu.
*      Function    :  For testing the IIS into fts08 on FPGA.
***********************************************************************/

#include  "FtEVBMain.h"

#define  PCM_FILE_SIZE 64000
U16 gusPCMDatBuf [PCM_FILE_SIZE];

INT8 FtI2Stest_out  ( InCmd *pCmdInputBuf, PATH * pCurPath )
{
    UINT32    temp;
    U8        ucCnt;  
    U8        ucDTmp;
    UINT32    unCnt;    
    
    FtFile * fp;
    
    //get file name.    
    UINT8  ucpFileName[13];
    UINT8  ucPara[13];
    if ( 0 >= FtFsMMI_GetPara( pCmdInputBuf, 
                             SPACE, 
                             13, 
                             ucPara) )
        {
            Uart_Printf("\n File name error!\n");
        }
    FtFileSys_sscanf(ucPara, "%s", ucpFileName);    //change file name to string type
    
    Uart_Printf("\n File name is %s.", ucpFileName);
    
    fp = fopenf( ucpFileName, 0x01 );
    
    if ( fp == (void *) 0 )
        Uart_Printf("\n The file \"%s\" doesn't exist.", ucpFileName);
    else 
    {
    	//read PCM file.
        Uart_Printf("\n Open file successful.");
        freadf  ( fp, (U8 *)gusPCMDatBuf, PCM_FILE_SIZE*2); 
        fclosef( fp );
    } 
    
    //顯示前8個數據.
    for ( ucCnt =0; ucCnt<8;ucCnt++)
    {
      Uart_Printf ("\n 0x%x", gusPCMDatBuf[ucCnt]);
    }
    
    //****** IIS Port ******
        //Configure PF5~8 as I2S Bus lines, PE8 as CODECLK(output?)
        // rPCONF Bit10~21.
        // PF5: I2SLRCK <-rPCONF[12:10] = 100b.
        // PF6: I2SDO   <-rPCONF[15:13] = 100b.
        // PF7: I2SDI   <-rPCONF[18:16] = 100b.
        // PF8: I2SCLK  <-rPCONF[21:19] = 100b.
	temp   = rPCONF;    
	temp  &= 0xffc003ff;    //Clear the previous setting for PF5-PF8.
	temp  |= 0x249000;      //Set PF5-PF8 to I2S bus lines.
 	rPCONF = temp;	
 	rPUPF |= 0x1e;          //Disable pullup risistors.
	
	//PE8: CODECLK <- rPCONE[17:16] = 10b.
	//For Hardware, Should fly a wire from R30 with DAC SysCLK pin.
	
	rPCONE  = (rPCONE&0xfffcffff); 
	rPCONE |= 0x00020000;	

	
    //****** IIS Init ******
    //I2S registers setting.
        rIISMOD  = 0x089;	// Master mode, Transmit mode, L-ch=low, iis, 16bit/ch, codeclk=256fs, lrck=32fs.
        rIISPSR  = 0x22;        // value=6, 32khz, 8.192M->49.152M        
        rIISFCON = 0x200;       // DMA access mode, Transfer fifo only. 
	rIISCON  = 0x002;       //bit0=1, start IIS;
	                    	
	Delay(10);
	
	//Disable all interrupts.
	rINTMSK |=BIT_GLOBAL;
	
	ucDTmp = *((volatile U8 *) 0x01D18000); //rIISCON[8:0]
	
	ucCnt = 0;
	unCnt = 0;
	
	//write first fifo
	while ( ucCnt<8 )
	{
	  *IISFIF = gusPCMDatBuf[unCnt+ucCnt];
	  ucCnt++;
	}
	unCnt += ucCnt;
	
	ucDTmp = *((volatile U8 *) 0x01D18000); //rIISCON[8:0]	
	ucDTmp = 0x00;
	
	//Start the transfer.
	rIISCON  |= 0x01;
        
        while(ucDTmp != ETX )
        {
	    while ( unCnt < (PCM_FILE_SIZE - 8)  )
	    {
	         //Wait TxFifo Empty.
	         ucDTmp = *((volatile U8 *) 0x01D18000); //rIISCON[8:0]
	         
	         while ( ucDTmp&0x80 ) //TxFifo not empty
	         {
	           ucDTmp = *((volatile U8 *) 0x01D18000); //rIISCON[8:0]
	         }
	         
	         //Write data to TxFifo.
	         ucCnt = 0;  
	         while ( ucCnt<8 )
	         {
	           *IISFIF = gusPCMDatBuf[unCnt+ucCnt];
	           ucCnt++;
	         }
	         unCnt += ucCnt; 
	    }
            unCnt = 0;    
            ucDTmp = Uart_GetKey();	    
	} 
                                
	//Stop the transfer.
	rIISCON  &= 0xfffffffe;
	
	//Enable all interrupts.
	rINTMSK &= ~BIT_GLOBAL;
}