//###########################################################################
//
// FILE:   Main.h
//
// TITLE:  Pre-definitions of main function.
//
// DESCRIPTION:
//              All the pre-definitions of main function are defined in 
//              this file. DELAY_US(A) is a delay function with 1us unit.
//
//###########################################################################
/*-----------------------------------------------------------------------------
      Specify the clock rate of the CPU (SYSCLKOUT) in nS.

      Take into account the input clock frequency and the PLL multiplier
      selected in step 1.
 
      Use one of the values provided, or define your own.
      The trailing L is required tells the compiler to treat 
      the number as a 64-bit value.  

      Only one statement should be uncommented.

      Example:  CLKIN is a 30MHz crystal. 
 
                In step 1 the user specified PLLCR = 0xA for a 
                150Mhz CPU clock (SYSCLKOUT = 150MHz).
                In this case, the CPU_RATE will be 6.667L
                Uncomment the line:  #define CPU_RATE  6.667L   
                
                Or the user specified PLLCR = 0x8 for a 
                120Mhz CPU clock (SYSCLKOUT = 120MHz).        
                In this case, the CPU_RATE will be 8.333L 
                Uncomment the line:  #define CPU_RATE  8.333L   
-----------------------------------------------------------------------------*/

#define CPUFREQUENCY150MHZ 
//#define CPUFREQUENCY135MHZ
//#define CPUFREQUENCY120MHZ

//----------------------------------------------------------------------------
#ifdef CPUFREQUENCY150MHZ
//----------------------------------------------------------------------------
// CPU is running in 150MHz
// CLKIN = OSCLK*4, HSPCLK = CLKIN = 150MHz; LSPCLK = CLKIN/4 = 37.5MHz
// 1010b: CLKIN = OSCLK*5 1001b: CLKIN = OSCLK*3.5; 1000b: CLKIN = OSCLK*4
#define PLLSCALE 0x000A
#define CPU_RATE 6.667L   // for a 150MHz CPU clock speed (SYSCLKOUT)
 
// CPU Timers
// 150MHz: 150000(1ms) 

#define T0PERIOD 150000   // For CPU Timer0
#define T1PERIOD 150000   // For CPU Timer1
#define T2PERIOD 150000   // For CPU Timer2
// EV Timers definition
// EV Timer1,2,3,4's clock(EVTCLK) = HSPCLK/1
// 100us Interrupt (0x3a97(15000)

#define EVT1PERIOD 0x3A97 // For EV Timer1
#define EVT2PERIOD 18749  // For EV Timer2 1ms (Sample rate for ADC)
#define EVT3PERIOD 0x3A97 // For EV Timer3
#define EVT4PERIOD 0x3A97 // For EV Timer4 

// SCI definition
// Baud = LSPCLK/((BRR + 1)*8); BRR = LSPCLK/(Baud*8) - 1
// Baud Rate = 921600; BRR = 0x0004 (SCIHBAUDA = 0x00; SCILBAUDA = 0x04)  
// Baud Rate = 230400; BRR = 0x0013 (SCIHBAUDA = 0x00; SCILBAUDA = 0x13)
// Baud Rate = 115200; BRR = 0x0027 (SCIHBAUDA = 0x00; SCILBAUDA = 0x27)
// Baud Rate = 57600 ; BRR = 0x0041 (SCIHBAUDA = 0x00; SCILBAUDA = 0x41)
// Baud Rate = 56000 ; BRR = 0x0042 (SCIHBAUDA = 0x00; SCILBAUDA = 0x42)
// Baud Rate = 19200 ; BRR = 0x00C2 (SCIHBAUDA = 0x00; SCILBAUDA = 0xC2)
// Baud Rate = 9600  ; BRR = 0x01E7 (SCIHBAUDA = 0x01; SCILBAUDA = 0xE7)

// For SCIA
#define SCIABAUDH 0x00
#define SCIABAUDL 0x27

// For SCIB
#define SCIBBAUDH 0x00
#define SCIBBAUDL 0x27

/***************************************************/
/* Bit configuration parameters for 150 MHz SYSCLKOUT*/ 
/***************************************************/

#define BITTIMING 0x001302D2

/* The table below shows how BRP field must be changed to achieve different bit
rates with a BT of 15, for a 80% SP:
BT = (TSEG1(3:6) + 1) + (TSEG2(0:2) + 1) +1; SJW = SJW(reg) + 1; SJW = min(4, TSEG2+1)
 31     -     24 23    -      1615    -   10  9 8  7  6 5 4 3 2 1 0
|- - - - - - - -|- - - - - - - -|- - - - - - |- -| - |- - - -|- - -|
|   Reserved    |     BRP       |  Reserved  |SJW|SAM|TSEG1  |TSEG2|
|- - - - - - - -|- - - - - - - -|- - - - - - |- -| - |- - - -|- - -|
---------------------------------------------------
BT = 15, TSEG1 = 10, TSEG2 = 2, Sampling Point = 80% 
---------------------------------------------------
1   Mbps : BRP+1 = 10 	: CAN clock = 15 MHz
500 kbps : BRP+1 = 20 	: CAN clock = 7.5 MHz 
250 kbps : BRP+1 = 40 	: CAN clock = 3.75 MHz 
125 kbps : BRP+1 = 80 	: CAN clock = 1.875 MHz 
100 kbps : BRP+1 = 100 	: CAN clock = 1.5 MHz
50  kbps : BRP+1 = 200 	: CAN clock = 0.75 MHz
The table below shows how to achieve different sampling points with a BT of 25:
-------------------------------------------------------------
Achieving desired SP by changing TSEG1 & TSEG2 with BT = 25  
-------------------------------------------------------------
TSEG1 = 18, TSEG2 = 4, SP = 80% 
TSEG1 = 17, TSEG2 = 5, SP = 76% 
TSEG1 = 16, TSEG2 = 6, SP = 72% 
TSEG1 = 15, TSEG2 = 7, SP = 68% 
TSEG1 = 14, TSEG2 = 8, SP = 64% 
The table below shows how BRP field must be changed to achieve different bit
rates with a BT of 25, for the sampling points shown above: 
1   Mbps : BRP+1 = 6 
500 kbps : BRP+1 = 12 
250 kbps : BRP+1 = 24 
125 kbps : BRP+1 = 48 
100 kbps : BRP+1 = 60
50  kbps : BRP+1 = 120 */

// End definition for CPU Frequency 150MHz
 
//----------------------------------------------------------------------------
#else
//----------------------------------------------------------------------------
// CPU is running in 120MHz
// CLKIN = OSCLK*4, HSPCLK = CLKIN = 120MHz; LSPCLK = CLKIN/4 = 30MHz

#define PLLSCALE 0x0008
#define CPU_RATE    8.333L   // for a 120MHz CPU clock speed (SYSCLKOUT)

// CPU Timers
// 120MHz: 120000(1ms) 

#define T0PERIOD 120000   // For CPU Timer0
#define T1PERIOD 120000   // For CPU Timer1
#define T2PERIOD 120000   // For CPU Timer2
// EV Timers definition 
// EV Timer1,3,4's clock(EVTCLK) = HSPCLK/1
// 100us Interrupt 0x2EDF(12000)
// EV Timer2's clock(EVTCLK) = HSPCLK/8=15MHz
#define EVT1PERIOD 0x2EDF // For EV Timer1 0.1ms
#define EVT2PERIOD 14999  // For EV Timer2 1ms (Sample rate for ADC)
#define EVT3PERIOD 0x2EDF // For EV Timer3
#define EVT4PERIOD 0xD055 // For EV Timer4 T4CLK = 0.9375MHz Peroid about 50ms

// SCI definition
// Baud = LSPCLK/((BRR + 1)*8); BRR = LSPCLK/(Baud*8) - 1 
// Baud Rate = 921600; BRR = 0x0003 (SCIHBAUDA = 0x00; SCILBAUDA = 0x03)
// Baud Rate = 460800; BRR = 0x0007 (SCIHBAUDA = 0x00; SCILBAUDA = 0x07)
// Baud Rate = 230400; BRR = 0x000F (SCIHBAUDA = 0x00; SCILBAUDA = 0x0F)
// Baud Rate = 115200; BRR = 0x001F (SCIHBAUDA = 0x00; SCILBAUDA = 0x1F)
// Baud Rate = 9600  ; BRR = 0x0185 (SCIHBAUDA = 0x01; SCILBAUDA = 0x85)

// For SCIA
#define SCIABAUDH 0x00
#define SCIABAUDL 0x1f

// For SCIB
#define SCIBBAUDH 0x00
#define SCIBBAUDL 0x1F
// End definition for CPU Frequency 120MHz

//----------------------------------------------------------------------------
#endif     // End ifdef
//----------------------------------------------------------------------------

//----------------------------------------------------------------------------
// DO NOT MODIFY THIS LINE. The time is Aus.

#define DELAY_US(A)  DSP28x_usDelay(((((long double) A * 1000.0L) / (long double)CPU_RATE) - 9.0L) / 5.0L)
extern void DSP28x_usDelay(unsigned long Count);

//===========================================================================
//The zone of system initializations definition
//===========================================================================

extern void InitSysCtrl( void );
extern void KickDog( void );
extern void DisableDog( void );
extern void GpioInit( void );
extern void EvInit( void );
extern void SciInit( void );
extern void XintfInit( void );
//extern void XintInit( void );
extern void AdcInit( void );
extern void VarsInit( void );
extern void SelfDetection(void);   
extern void ECanInit( void );
extern void ECanConfig( void );
extern void SpiInit(void);
//===========================================================================
//The zone of CPU Times and EV module definition 
//===========================================================================
//---------------------------------------------------------------------------
// Function prototypes and external definitions:

#define INTERVAL 200 
#define STARTGPT1 T1CON |= BIT6
#define STARTGPT2 T2CON |= BIT6
#define STARTGPT3 T3CON |= BIT6
#define STARTGPT4 T4CON |= BIT6
#define ENDGPT1 T1CON &= 0xFFBF
#define ENDGPT2 T2CON &= 0xFFBF
#define ENDGPT3 T3CON &= 0xFFBF
#define ENDGPT4 T4CON &= 0xFFBF
extern void ConfigCpuTimers( void );
extern void Timers0Start( void );
extern void Timers1Start( void );
extern void Timers2Start( void );
extern void Timers0Stop( void );
extern void Timers1Stop( void );
extern void Timers2Stop( void );
//===========================================================================
//The zone of Adc definition 
//===========================================================================
//---------------------------------------------------------------------------
// Function prototypes and external definitions:

#define ADC_usDELAY  8000L
#define ADC_usDELAY2 20L
// ADC start parameters
// #define AVG        100    // Average sample limit
// #define ZOFFSET    0x00   // Average Zero offset
#define BUFSIZE    1000   // Sample buffer size
// #define REALBUFSIZE 1024

//===========================================================================
//The zone of Sci definition 
//===========================================================================
//---------------------------------------------------------------------------
// Function prototypes and external definitions:

#define SENDBUFSIZE 2068
#define STARTSCIA SCIFFTXA |= BIT13
#define ENDSCIA SCIFFTXA &= 0xDFFF
#define STARTSCIB SCIFFTXB |= BIT13
#define ENDSCIB SCIFFTXB &= 0xDFFF
#define RUNNING 44

void UartSend(void);
void SendTrainStatus(unsigned char Status);

//===========================================================================
//The other definition
//===========================================================================
//---------------------------------------------------------------------------
// Function prototypes and external definitions:

#define SCALE2 2
#define SCALE3 3
#define SCALE4 4
#define SCALE5 5

//===========================================================================
//The zone of error definition 
//===========================================================================
//---------------------------------------------------------------------------
// Function prototypes and external definitions:

#define ERROR_L1 1
#define ERROR_L2 2
#define ERROR_L3 3
#define ERROR_L4 4
#define ERROR_L5 5

//===========================================================================
// NO MORE!
//===========================================================================