?? rs_pwm.asm
字號:
Title "RS_PWM.asm"
list p=16c74,f=inhx8m
;This program runs on the PICDEM-2 demo board.
;In the Demo board, Port B is connected to 8 LEDs.
;When the PIC16C74 receives a word of data from
;the USART, the value is displayed on the LEDs and
;is retransmitted to the host computer.
STATUS equ 03H ;Status Register
PCL equ 02H
PORTB equ 06H ;PORTB Data Latch when written PORTB pins when read PORTB = 8 Bit wide bi-directional port
TRISB equ 06H
PORTC equ 07H
TRISC equ 07H
TMR2 equ 11H
PR2 equ 92H
CCP1CON equ 17H
CCP2CON equ 1DH
CCPR1L equ 15H
CCPR2L equ 1BH
T2CON equ 12H
CASE equ 21H
TEMP_X equ 22H
INTCON equ 0BH ;Interrupt ... Register
PIE1 equ 0CH ;Contains individual enable bits for the Peripheral Interrupt Register
PIR1 equ 0CH ;Contains individual flag bits for the Peripheral Interrupt Register
TXSTA equ 18H ;Transmit Status and Control Register
;Bit 2 of TXSTA = BRGH (Baud Rate Generator High Speed)
;Equations:
;Bit 2: BRGH = 0 (Low Speed)
;Bit 4: SYNC = 0 (Asynchronous) Desired Baud Rate = Fosc (4 MHz)/64(X+1) (For 9600 X=5.51 --> Calculated Baud Rate w/ X=6 --> 8929 = 7 % Error)
;Bit 4: SYNC = 1 (Synchronous) Desired Baud Rate = Fosc (4 MHz)/4(X+1)
;Bit 2: BRGH = 1 (High Speed); SYNC = 0 Desired Baud Rate = Fosc (4 MHz)/16(X+1) (For 9600 X=25.042 --> Calculated Baud Rate w/ X=25 --> 9615 = 0.16 % Error)
;X = SPBRG Value (decimal) (For 2404 Baud --> X = 103)
RCSTA equ 18H ;Receive Status and Control Register
TXREG equ 19H ;USART Transmit Data Register (USART = Universal Synchronous Asynchronous Receiver Transmitter)
SPBRG equ 19H ;Baud Rate Generator Register
RCREG equ 1AH ;USART Receive Data Register
PIR1 equ 0CH ;-Doppelt deklariert??
COUNT equ 0x20
Z equ 2h
RP0 equ 5h ;Register Bank Select Bits (used for direct adressing)
org 00h ;Reset Vector
goto Start ;Unconditional Branch to Start; PC = Address Start
org 04h
goto IntVector
org 05h ;Beginning of program EPROM
Init
bcf STATUS,RP0 ;Status[RP0]=1
clrf PORTC
bsf STATUS,RP0 ;Status[RP0]=1
clrf TRISC
bcf STATUS,RP0 ;Status[RP0]=1
clrf PORTB ;Clear PORTB output latches
;Z=1
bsf STATUS,RP0 ;Status[RP0]=1
clrf TRISB ;Config PORTB as all outputs
;Z=1
movlw b'00100000' ;Move 8 Bits into W; Enable RCIF interrupt
movwf PIE1 ;Move W into PIE1 --> RCIE=1 Enables the USART receive interrupt
movlw 18h ;Move 18h into W; 9600 baud @4MHz
movwf SPBRG ;Move W(==18h) into SPBRG --> Baud Rate Generator Register = 29h == 9600 Baud
movlw b'10100100' ;Move 8 Bits into W; Async, High baud rate
movwf TXSTA ;Move W into TXSTA
;TXSTA[7]= CSRC (Clock Source Bit); 1 == Don't care (W/ SYNC == 1 --> 1 == Master mode (Clock internally from BRG))
;TXSTA[6]= TX9 (9 bit Transmit Enable Bit) 0 == Select 8 bit tranmissions
;TXSTA[5]= TXEN (Transmit Enable Bit); 1 == Transmit enabled
;TXSTA[4]= SYNC (USART Mode Serlect Bit); 0 == Asynchronous mode
;TXSTA[3]= Unimplemented (Read as 0)
;TXSTA[2]= BRGH (High Baud Rate Select Bit); 1 == (w/ SYNC = 0) 1 == High Speed
;TXSTA[1]= TRMT (Transmit Shift Register Status Bit); 0 == TSR full
;TXSTA[0]= TX9D (9th Bit of transmit data. Can be parity bit)
bcf STATUS,RP0 ;STATUS[RP0]= 0; 0 == Register Bank 0 selected (00h - 7fh)
movlw b'10010000' ;Move 8 Bit into W; Enable continous reception
movwf RCSTA ;Move W into RCSTA
;RCSTA[7]= SPEN (Serial Port Enable Bit); 1 == Serial Port enabled
;RCSTA[6]= RX9 (9 bit Receive Enable Bit) 0 == Select 8 bit reception
;RCSTA[5]= SREN (Single Receive Enable Bit); 0 == (w/ SYNC = 0) Don't care
;RCSTA[4]= CREN (Continous Receive Bit); 1 == (w/ SYNC = 0) Enables continous receive
;RCSTA[3]= Unimplemented (Read as 0)
;RCSTA[2]= FERR (Framing Error Bit); 0 == no error (1 == Framing Error --> Can be updated by reading RCREG register)
;RCSTA[1]= OERR (Overrun Error Bit); 0 == no overrun error ( 1 == Overrun error --> Can be cleared by clearing bit CREN)
;RCSTA[0]= RX9D (9th Bit of received data. Can be parity bit)
movlw b'11000000' ;Move 8 Bit into W; Enable global interrupts
movwf INTCON ;Move W into INTCON
;INTCON[7]= GIE (Global Interrupt Enable Bit); 1 == Enables all un-masked interrupts
;INTCON[6]= PEIE (Peripheral Interrupt Enable Bit); 1 == Enables all un-masked peripheral interrupts
;INTCON[5]= TOIE (TMRO Overflow Interrupt Enable Bit); 0 == Disables the TMRO Interrupt
;INTCON[4]= INTE (RBO/INT External Interrupt Enable Bit)0 == Disables the the RBO/INT external interrupt
;INTCON[3]= RBIE (RB Port Change interrupt Enable Bit); 0 == Disabled
;INTCON[2]= TOIF (TMRO Overflow Interrupt Flag); 0 == no overflow
;INTCON[1]= INTF (RBO/INT External Interrupt Flag Bit); 0 == no RB=/INT Ext. Interrupt did occur
;INTCON[0]= RBIF (RB Port Change Interrupt Flag Bit); 0 == None of the RB7:RB4 pins have changed state
bsf STATUS,RP0 ; Umschaltung auf Bank
movlw B'10000000' ; Port C Bit 0,1 als Ausgabe (PWM)
movwf TRISC ; Port C Bit 7 als Eingabe (C0=Zustand)
movlw B'11111111'
movwf PR2 ; PR2 Register f黵 PWM setzen
bcf STATUS,RP0 ; Umschaltung auf Bank 0
clrf CCP1CON
nop
movlw 0x0c
movwf CCP1CON ; als PWM initialisieren
clrf CCP2CON
nop
movlw 0x0c
movwf CCP2CON ; als PWM initialisieren
movlw B'00000100'
movwf T2CON ; Initialisierung und Einschalten von Timer2
bsf STATUS,RP0
movlw B'10000000'
movwf TRISC
bcf STATUS,RP0 ; Umschaltung auf Bank 0
return
return
;end of Init
IntVector
Loop1
movlw 06h ;Mask out unwanted bits; 8 bit Literal (06h) is loaded into W register
andwf RCSTA,W ;Check for errors; And W w/ RCSTA: If W==0 then W=result else RCSTA=result; Status affected Z
btfss STATUS,2 ;Zero Bit test, skip if set
;Zero Bit=1 when result==0; Zero Bit=0 when result=!0
;Status[2]==1 ? next line: NOP instead of next line
goto RcvError ;Found error, flag it
btfss PIR1,5 ;RCIF Bit test, skip if zero; Check for data ready
;Bit 5 = RCIF = Serial communication interface receive interrupt flag
;1 = Receive buffer is full
;0 = Receive buffer is empty
retfie ;Return from interrupt
;Some other interrupt, exit
btfss CASE,0
goto Else_
goto Case1
Else_
bsf CASE,0
movf RCREG,W ;Get input data
movwf TEMP_X ;Move data into Temp_X
goto Case_end
Case1
bcf CASE,0
movf RCREG,W ;Get input data
movwf CCPR2L ;Value into PWM2 - register
movf TEMP_X,0 ;Move Temp_X into W register
movwf CCPR1L
goto Case_end
Case_end
goto Loop1
retfie ;Return from interrupt
;end of InitVector
RcvError
bcf RCSTA,4 ;Clear reciever status; RCSTA[4]=0
bsf RCSTA,4 ;RCSTA[4]=1
movlw 0FFh ;Light all LEDs
movwf PORTB
retfie ;Return from interrupt
;end of RcvError
Start call Init
Loop
goto Loop ;Unconditional Branch to Loop; PC = Address Loop
end
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