Name       ADDR36X;
Designer   W.ch;
Device     g16v8;

/** Inputs **/
pin 2  = a2 ;
pin 3  = a3 ;
pin 4  = a4 ;
pin 5  = a5 ;
pin 6  = a6 ;
pin 7  = a7 ;
pin 8  = a8 ;
pin 9  = a9 ;
pin 12 = a10 ;
pin 13 = a11 ;
pin 14 = a12 ;
pin 17 = !pci_rst ;
pin 1  = s0 ;
pin 11 = s1 ;
pin 18 = s2 ;
pin 19 = s3 ;

/** Outputs **/
pin 16 = reset ;   /* ISA bus reset, high action */
pin 15 = !match ;  /* address match, low action */

/** Declarations and Intermediate Variable Definitions  **/

/* field addr = [a12..2] ; */ /* CH361 must use a12-a0 */
field addr = [a9..2] ;  /* CH365 only use a9-a0 */
field sel  = [s3..0] ;

/** Logic Equations **/

reset = pci_rst ;
match = addr:['h'0360..036f];