?? function.lst
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C51 COMPILER V7.50 FUNCTION 11/21/2006 14:47:20 PAGE 1
C51 COMPILER V7.50, COMPILATION OF MODULE FUNCTION
OBJECT MODULE PLACED IN .\OUT\function.obj
COMPILER INVOKED BY: D:\keil2\C51\BIN\C51.EXE function.c LARGE BROWSE DEBUG OBJECTEXTEND CODE LISTINCLUDE SYMBOLS PRINT(
-.\LIST\function.lst) OBJECT(.\OUT\function.obj)
line level source
1 #include "define.h"
1 =1
2 =1
3 =1 #include <AT89X52.H>
1 =2 /*******************************************************************************
2 =2 AT89X52.H
3 =2 Copyright (c) InnoLux Corp. All rights reserved.
4 =2 *******************************************************************************/
5 =2
6 =2 #ifndef AT89X52_HEADER_FILE
7 =2 #define AT89X52_HEADER_FILE 1
8 =2
9 =2 /*------------------------------------------------
10 =2 Byte Registers
11 =2 ------------------------------------------------*/
12 =2 sfr P0 = 0x80;
13 =2 sfr SP = 0x81;
14 =2 sfr DPL = 0x82;
15 =2 sfr DPH = 0x83;
16 =2 sfr PCON = 0x87;
17 =2 sfr TCON = 0x88;
18 =2 sfr TMOD = 0x89;
19 =2 sfr TL0 = 0x8A;
20 =2 sfr TL1 = 0x8B;
21 =2 sfr TH0 = 0x8C;
22 =2 sfr TH1 = 0x8D;
23 =2 sfr P1 = 0x90;
24 =2 sfr SCON = 0x98;
25 =2 sfr SBUF = 0x99;
26 =2 sfr P2 = 0xA0;
27 =2 sfr IE = 0xA8;
28 =2 sfr P3 = 0xB0;
29 =2 sfr IP = 0xB8;
30 =2 sfr T2CON = 0xC8;
31 =2 sfr T2MOD = 0xC9;
32 =2 sfr RCAP2L = 0xCA;
33 =2 sfr RCAP2H = 0xCB;
34 =2 sfr TL2 = 0xCC;
35 =2 sfr TH2 = 0xCD;
36 =2 sfr PSW = 0xD0;
37 =2 sfr P4 = 0xD8;
38 =2 sfr ACC = 0xE0;
39 =2 sfr B = 0xF0;
40 =2
41 =2 /*------------------------------------------------
42 =2 P0 Bit Registers
43 =2 ------------------------------------------------*/
44 =2 sbit P0_0 = P0^0;
45 =2 sbit P0_1 = P0^1;
46 =2 sbit P0_2 = P0^2;
47 =2 sbit P0_3 = P0^3;
48 =2 sbit P0_4 = P0^4;
49 =2 sbit P0_5 = P0^5;
50 =2 sbit P0_6 = P0^6;
C51 COMPILER V7.50 FUNCTION 11/21/2006 14:47:20 PAGE 2
51 =2 sbit P0_7 = P0^7;
52 =2
53 =2 /*------------------------------------------------
54 =2 PCON Bit Values
55 =2 ------------------------------------------------*/
56 =2 #define IDL_ 0x01
57 =2
58 =2 #define STOP_ 0x02
59 =2 #define PD_ 0x02 /* Alternate definition */
60 =2
61 =2 #define GF0_ 0x04
62 =2 #define GF1_ 0x08
63 =2 #define SMOD_ 0x80
64 =2
65 =2 /*------------------------------------------------
66 =2 TCON Bit Registers
67 =2 ------------------------------------------------*/
68 =2 sbit IT0 = 0x88;
69 =2 sbit IE0 = 0x89;
70 =2 sbit IT1 = 0x8A;
71 =2 sbit IE1 = 0x8B;
72 =2 sbit TR0 = 0x8C;
73 =2 sbit TF0 = 0x8D;
74 =2 sbit TR1 = 0x8E;
75 =2 sbit TF1 = 0x8F;
76 =2
77 =2 /*------------------------------------------------
78 =2 TMOD Bit Values
79 =2 ------------------------------------------------*/
80 =2 #define T0_M0_ 0x01
81 =2 #define T0_M1_ 0x02
82 =2 #define T0_CT_ 0x04
83 =2 #define T0_GATE_ 0x08
84 =2 #define T1_M0_ 0x10
85 =2 #define T1_M1_ 0x20
86 =2 #define T1_CT_ 0x40
87 =2 #define T1_GATE_ 0x80
88 =2
89 =2 #define T1_MASK_ 0xF0
90 =2 #define T0_MASK_ 0x0F
91 =2
92 =2 /*------------------------------------------------
93 =2 P1 Bit Registers
94 =2 ------------------------------------------------*/
95 =2 sbit P1_0 = P1^0;
96 =2 sbit P1_1 = P1^1;
97 =2 sbit P1_2 = P1^2;
98 =2 sbit P1_3 = P1^3;
99 =2 sbit P1_4 = P1^4;
100 =2 sbit P1_5 = P1^5;
101 =2 sbit P1_6 = P1^6;
102 =2 sbit P1_7 = P1^7;
103 =2
104 =2 sbit T2 = 0x90; /* External input to Timer/Counter 2, clock out */
105 =2 sbit T2EX = 0x91; /* Timer/Counter 2 capture/reload trigger & dir ctl */
106 =2
107 =2 /*------------------------------------------------
108 =2 SCON Bit Registers
109 =2 ------------------------------------------------*/
110 =2 sbit RI = 0x98;
111 =2 sbit TI = 0x99;
112 =2 sbit RB8 = 0x9A;
C51 COMPILER V7.50 FUNCTION 11/21/2006 14:47:20 PAGE 3
113 =2 sbit TB8 = 0x9B;
114 =2 sbit REN = 0x9C;
115 =2 sbit SM2 = 0x9D;
116 =2 sbit SM1 = 0x9E;
117 =2 sbit SM0 = 0x9F;
118 =2
119 =2 /*------------------------------------------------
120 =2 P2 Bit Registers
121 =2 ------------------------------------------------*/
122 =2 sbit P2_0 = P2^0;
123 =2 sbit P2_1 = P2^1;
124 =2 sbit P2_2 = P2^2;
125 =2 sbit P2_3 = P2^3;
126 =2 sbit P2_4 = P2^4;
127 =2 sbit P2_5 = P2^5;
128 =2 sbit P2_6 = P2^6;
129 =2 sbit P2_7 = P2^7;
130 =2
131 =2 /*------------------------------------------------
132 =2 IE Bit Registers
133 =2 ------------------------------------------------*/
134 =2 sbit EX0 = 0xA8; /* 1=Enable External interrupt 0 */
135 =2 sbit ET0 = 0xA9; /* 1=Enable Timer 0 interrupt */
136 =2 sbit EX1 = 0xAA; /* 1=Enable External interrupt 1 */
137 =2 sbit ET1 = 0xAB; /* 1=Enable Timer 1 interrupt */
138 =2 sbit ES = 0xAC; /* 1=Enable Serial port interrupt */
139 =2 sbit ET2 = 0xAD; /* 1=Enable Timer 2 interrupt */
140 =2
141 =2 sbit EA = 0xAF; /* 0=Disable all interrupts */
142 =2
143 =2 /*------------------------------------------------
144 =2 P3 Bit Registers (Mnemonics & Ports)
145 =2 ------------------------------------------------*/
146 =2 sbit P3_0 = P3^0;
147 =2 sbit P3_1 = P3^1;
148 =2 sbit P3_2 = P3^2;
149 =2 sbit P3_3 = P3^3;
150 =2 sbit P3_4 = P3^4;
151 =2 sbit P3_5 = P3^5;
152 =2 sbit P3_6 = P3^6;
153 =2 sbit P3_7 = P3^7;
154 =2
155 =2 sbit RXD = 0xB0; /* Serial data input */
156 =2 sbit TXD = 0xB1; /* Serial data output */
157 =2 sbit INT0 = 0xB2; /* External interrupt 0 */
158 =2 sbit INT1 = 0xB3; /* External interrupt 1 */
159 =2 sbit T0 = 0xB4; /* Timer 0 external input */
160 =2 sbit T1 = 0xB5; /* Timer 1 external input */
161 =2 sbit WR = 0xB6; /* External data memory write strobe */
162 =2 sbit RD = 0xB7; /* External data memory read strobe */
163 =2
164 =2 /*------------------------------------------------
165 =2 IP Bit Registers
166 =2 ------------------------------------------------*/
167 =2 sbit PX0 = 0xB8;
168 =2 sbit PT0 = 0xB9;
169 =2 sbit PX1 = 0xBA;
170 =2 sbit PT1 = 0xBB;
171 =2 sbit PS = 0xBC;
172 =2 sbit PT2 = 0xBD;
173 =2
174 =2 /*------------------------------------------------
C51 COMPILER V7.50 FUNCTION 11/21/2006 14:47:20 PAGE 4
175 =2 T2CON Bit Registers
176 =2 ------------------------------------------------*/
177 =2 sbit CP_RL2= 0xC8; /* 0=Reload, 1=Capture select */
178 =2 sbit C_T2 = 0xC9; /* 0=Timer, 1=Counter */
179 =2 sbit TR2 = 0xCA; /* 0=Stop timer, 1=Start timer */
180 =2 sbit EXEN2= 0xCB; /* Timer 2 external enable */
181 =2 sbit TCLK = 0xCC; /* 0=Serial clock uses Timer 1 overflow, 1=Timer 2 */
182 =2 sbit RCLK = 0xCD; /* 0=Serial clock uses Timer 1 overflow, 1=Timer 2 */
183 =2 sbit EXF2 = 0xCE; /* Timer 2 external flag */
184 =2 sbit TF2 = 0xCF; /* Timer 2 overflow flag */
185 =2
186 =2 /*------------------------------------------------
187 =2 T2MOD Bit Values
188 =2 ------------------------------------------------*/
189 =2 #define DCEN_ 0x01 /* 1=Timer 2 can be configured as up/down counter */
190 =2 #define T2OE_ 0x02 /* Timer 2 output enable */
191 =2
192 =2 /*------------------------------------------------
193 =2 PSW Bit Registers
194 =2 ------------------------------------------------*/
195 =2 sbit P = 0xD0;
196 =2 sbit FL = 0xD1;
197 =2 sbit OV = 0xD2;
198 =2 sbit RS0 = 0xD3;
199 =2 sbit RS1 = 0xD4;
200 =2 sbit F0 = 0xD5;
201 =2 sbit AC = 0xD6;
202 =2 sbit CY = 0xD7;
203 =2 /*------------------------------------------------
204 =2 P4 Bit Registers (Mnemonics & Ports)
205 =2 ------------------------------------------------*/
206 =2 sbit P4_0 = P4^0;
207 =2 sbit P4_1 = P4^1;
208 =2 sbit P4_2 = P4^2;
209 =2 sbit P4_3 = P4^3;
210 =2 /*------------------------------------------------
211 =2 Interrupt Vectors:
212 =2 Interrupt Address = (Number * 8) + 3
213 =2 ------------------------------------------------*/
214 =2 #define IE0_VECTOR 0 /* 0x03 External Interrupt 0 */
215 =2 #define TF0_VECTOR 1 /* 0x0B Timer 0 */
216 =2 #define IE1_VECTOR 2 /* 0x13 External Interrupt 1 */
217 =2 #define TF1_VECTOR 3 /* 0x1B Timer 1 */
218 =2 #define SIO_VECTOR 4 /* 0x23 Serial port */
219 =2
220 =2 #define TF2_VECTOR 5 /* 0x2B Timer 2 */
221 =2 #define EX2_VECTOR 5 /* 0x2B External Interrupt 2 */
222 =2
223 =2 /*------------------------------------------------
224 =2 ------------------------------------------------*/
225 =2 #endif
226 =2
227 =2
228 =2
4 =1
5 =1 /*#define RES P0_1
6 =1 #define WR P0_2
7 =1 #define RS P0_3
8 =1 #define CS P0_0*/
9 =1 //========================
10 =1
11 =1
C51 COMPILER V7.50 FUNCTION 11/21/2006 14:47:20 PAGE 5
12 =1 #define PAUSE P3_5
13 =1 #define RES P3_0
14 =1
15 =1 #define RS P3_2
16 =1 #define CS P3_6
17 =1
18 =1 #define WR P3_1
19 =1 #define RD P3_7
20 =1 //=========================
21 =1 #define black 0x0000
22 =1 #define blue 0x001F
23 =1 #define green 0x07E0
24 =1 #define cyan 0x07FF
25 =1 #define red 0xF800
26 =1 #define yellow 0xFFE0
27 =1 #define white 0xFFFF
28 =1 #define gray0 0xa534
29 =1 #define gray1 0xad75
30 =1 #define gray2 0xb5b6
31 =1 #define gray3 0xBDF7
32 =1 #define gray4 0xc638
33 =1 #define gray5 0xce79
34 =1
35 =1 //============================================================================================//
36 =1 extern void HX8309A();
37 =1 extern void Next();
38 =1 extern void Pageselect(void);
39 =1 extern void delay(unsigned int num);
40 =1 extern void writec(unsigned int com);
41 =1 extern void writed(unsigned int dat);
42 =1 extern void gamma();
43 =1 extern void display_on();
44 =1 extern void init_data(unsigned int com,unsigned int dat);
45 =1 extern void disp(unsigned int dat);
46 =1 extern void RAM_ADRESS();
47 =1 extern void crosstalk();
48 =1 extern void flicker(void);
49 =1 extern void Chess(void);
50 =1 extern void snow(void);
51 =1 extern void disp_Gray_BarH(void);
52 =1 extern void Pause(void);
53 =1
2 #include"AT89X52.H"
1 =1 /*******************************************************************************
2 =1 AT89X52.H
3 =1 Copyright (c) InnoLux Corp. All rights reserved.
4 =1 *******************************************************************************/
5 =1
6 =1 #ifndef AT89X52_HEADER_FILE
=1 #define AT89X52_HEADER_FILE 1
=1
=1 /*------------------------------------------------
=1 Byte Registers
=1 ------------------------------------------------*/
=1 sfr P0 = 0x80;
=1 sfr SP = 0x81;
=1 sfr DPL = 0x82;
=1 sfr DPH = 0x83;
=1 sfr PCON = 0x87;
=1 sfr TCON = 0x88;
=1 sfr TMOD = 0x89;
=1 sfr TL0 = 0x8A;
C51 COMPILER V7.50 FUNCTION 11/21/2006 14:47:20 PAGE 6
=1 sfr TL1 = 0x8B;
=1 sfr TH0 = 0x8C;
=1 sfr TH1 = 0x8D;
=1 sfr P1 = 0x90;
=1 sfr SCON = 0x98;
=1 sfr SBUF = 0x99;
=1 sfr P2 = 0xA0;
=1 sfr IE = 0xA8;
=1 sfr P3 = 0xB0;
=1 sfr IP = 0xB8;
=1 sfr T2CON = 0xC8;
=1 sfr T2MOD = 0xC9;
=1 sfr RCAP2L = 0xCA;
=1 sfr RCAP2H = 0xCB;
=1 sfr TL2 = 0xCC;
=1 sfr TH2 = 0xCD;
=1 sfr PSW = 0xD0;
=1 sfr P4 = 0xD8;
=1 sfr ACC = 0xE0;
=1 sfr B = 0xF0;
=1
=1 /*------------------------------------------------
=1 P0 Bit Registers
=1 ------------------------------------------------*/
=1 sbit P0_0 = P0^0;
=1 sbit P0_1 = P0^1;
=1 sbit P0_2 = P0^2;
=1 sbit P0_3 = P0^3;
=1 sbit P0_4 = P0^4;
=1 sbit P0_5 = P0^5;
=1 sbit P0_6 = P0^6;
=1 sbit P0_7 = P0^7;
=1
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