/* motFcc2End.c - Second Generation Motorola FCC Ethernet network interface.*/ /* Copyright 1989-2002 Wind River Systems, Inc. */#include "copyright_wrs.h"/*modification history--------------------01a,14jan03,gjc  SPR#85164 Second Generation Motorola FCC END Driver.*//*DESCRIPTIONThis module implements a Motorola Fast Communication Controller (FCC)Ethernet network interface driver. This is a second generation driver that isbased off motFccEnd.c. It differs from the original in initialization, performance, features and SPR fixes. The driver "load string" interface differs from its predecessor. A parameter, that contains a pointer to a predefined array of function pointers, was addedto the end of the load string. Adding this structure removed a layer of ambiguity between the driver and the BSP interface. Multiple global function pointers  were used previously to provide hooks for the BSP to DPRAM (dual port ram) allocation, mii, duplex mode, heart beat and disconnect functions. See the load string interface belowTrying to link a modified version of the previous driver results in link errors. This was due to the global funtion definitions in the driver.Performace of the driver was greately enhanced. A layer of unnecessary queuingwas removed. Time critical functions were re-written to be more fluid and efficent. The drivers work load is distributed between the interrupt and the net job queue. Only one net job add is alowed per interrupt. Multiple events pending are sent as one call as an add to the job queue. TXBDs are freed in the interrupt code. Buffers for the RXBD ring are replenished in the interrupt.Allocation of the Mblks and Cblks happens in the code executing on the job context.RFC 2233 and IPV6 support were added as features.SPRs, written against the original motFccEnd driver, are fixed.The FCC supports several communication protocols. This driver supports the FCC to operate in Ethernet mode which is fully compliant with the IEEE 802.3u 10Base-T and 100Base-T specifications.The FCC establishes a shared memory communication system with the CPU,which may be divided into three parts: a set of Control/Status Registers (CSR)and FCC-specific parameters, the buffer descriptors (BD), and the data buffers.Both the CSRs and the internal parameters reside in the MPC8260's internalRAM. They are used for mode control and to extract status informationof a global nature. For instance, the types of events that shouldgenerate an interrupt, or features like the promiscous mode or thehearthbeat control may be set programming some of the CSRs properly.Pointers to both the Transmit Buffer Descriptors ring (TBD) and theReceive Buffer Descriptors ring (RBD) are stored in the internal parameterRAM. The latter also includes protocol-specific parameters, like theindividual physical address of this station or the max receive frame length.The BDs are used to pass data buffers and related buffer informationbetween the hardware and the software. They may reside either on the 60xbus, or on the CPM local bus They include local status information and apointer to the incoming or outgoing data buffers. These are located againin external memory, and the user may chose whether this is on the 60x bus,or the CPM local bus (see below).This driver is designed to be moderately generic. Without modification, it canoperate across all the FCCs in the MPC8260, regardless of where the internalmemory base address is located. To achieve this goal, this driver must begiven several target-specific parameters, and some external support routinesmust be provided.  These parameters, and the mechanisms used to communicatethem to the driver, are detailed below.This network interface driver does not include support for trailer protocolsor data chaining.  However, buffer loaning has been implemented in an effortto boost performance. In addition, no copy is performed of the outgoing packetbefore it is sent.BOARD LAYOUTThis device is on-board.  No jumpering diagram is necessary.EXTERNAL INTERFACEThe driver provides the standard external interface, motFccEnd2Load(), whichtakes a string of colon-separated parameters. The parameters should bespecified in hexadecimal, optionally preceeded by "0x" or a minus sign "-".The parameter string is parsed using strtok_r() and each parameter isconverted from a string representation to binary by a call tostrtoul(parameter, NULL, 16).The format of the parameter string is:"<immrVal>:<fccNum>:<bdBase>:<bdSize>:<bufBase>:<bufSize>:<fifoTxBase>:<fifoRxBase> :<tbdNum>:<rbdNum>:<phyAddr>:<phyDefMode>:<userFlags>:<function table>"TARGET-SPECIFIC PARAMETERS.IP <immrVal>Indicates the address at which the host processor presents its internalmemory (also known as the internal RAM base address). With this address,and the fccNum (see below), the driver is able to compute the location ofthe FCC parameter RAM, and, ultimately, to program the FCC for properoperations..IP <fccNum>This driver is written to support multiple individual device units.This parameter is used to explicitly state which FCC is being used (on thevads8260 board, FCC2 is wired to the Fast Ethernet tranceiver, thus thisparameter equals "2")..IP <bdBase>The Motorola Fast Communication Controller is a DMA-type device and typicallyshares access to some region of memory with the CPU. This driver is designedfor systems that directly share memory between the CPU and the FCC.This parameter tells the driver that space for both the TBDs and theRBDs needs not be allocated but should be taken from a cache-coherentprivate memory space provided by the user at the given address. The usershould be aware that memory used for buffers descriptors must be 8-bytealigned and non-cacheable. Therefore, the given memory space should allowfor all the buffer descriptors and the 8-byte alignment factor.If this parameter is "NONE", space for buffer descriptors is obtainedby calling cacheDmaMalloc() in motFccEndLoad()..IP <bdSize>The memory size parameter specifies the size of the pre-allocated memoryregion for the BDs. If <bdBase> is specified as NONE (-1), the driver ignoresthis parameter. Otherwise, the driver checks the size of the provided memoryregion is adequate with respect to the given number of Transmit BufferDescriptors and Receive Buffer Descriptors..IP <bufBase>This parameter tells the driver that space for data buffersneeds not be allocated but should be taken from a cache-coherentprivate memory space provided by the user at the given address. The usershould be aware that memory used for buffers must be 32-bytealigned and non-cacheable. The FCC poses one more constraint in that DMAcycles may initiate even when all the incoming data have already beentransferred to memory. This means at most 32 bytes of memory at the end ofeach receive data buffer, may be overwritten during reception. The driverpads that area out, thus consuming some additional memory.If this parameter is "NONE", space for buffer descriptors is obtainedby calling memalign() in sbcMotFccEndLoad()..IP <bufSize>The memory size parameter specifies the size of the pre-allocated memoryregion for data buffers. If <bufBase> is specified as NONE (-1), the driverignores this parameter. Otherwise, the driver checks the size of the providedmemory region is adequate with respect to the given number of Receive BufferDescriptors and a non-configurable number of trasmit buffers(MOT_FCC_TX_CL_NUM).  All the above should fit in the given memory space.This area should also include room for buffer management structures..IP <fifoTxBase>Indicate the base location of the transmit FIFO, in internal memory.The user does not need to initialize this parameter, as the defaultvalue (see MOT_FCC_FIFO_TX_BASE) is highly optimized for best performance.However, if the user wishes to reserve that very area in internal RAM forother purposes, he may set this parameter to a different value.If <fifoTxBase> is specified as NONE (-1), the driver uses the defaultvalue..IP <fifoRxBase>Indicate the base location of the receive FIFO, in internal memory.The user does not need to initialize this parameter, as the defaultvalue (see MOT_FCC_FIFO_TX_BASE) is highly optimized for best performance.However, if the user wishes to reserve that very area in internal RAM forother purposes, he may set this parameter to a different value.If <fifoRxBase> is specified as NONE (-1), the driver uses the defaultvalue..IP <tbdNum>This parameter specifies the number of transmit buffer descriptors (TBDs).Each buffer descriptor resides in 8 bytes of the processor's externalRAM space, If this parameter is less than a minimum number specified in themacro MOT_FCC_TBD_MIN, or if it is "NULL", a default value of 64 (seeMOT_FCC_TBD_DEF_NUM) is used. This number is kept deliberately high, sinceeach packet the driver sends may consume more than a single TBD. Thisparameter should always equal a even number..IP  <rbdNum>This parameter specifies the number of receive buffer descriptors (RBDs).Each buffer descriptor resides in 8 bytes of the processor's externalRAM space, and each one points to a 1584-byte buffer again in externalRAM. If this parameter is less than a minimum number specified in themacro MOT_FCC_RBD_MIN, or if it is "NULL", a default value of 32 (seeMOT_FCC_RBD_DEF_NUM) is used. This parameter should always equal a even number..IP  <phyAddr>This parameter specifies the logical address of a MII-compliant physicaldevice (PHY) that is to be used as a physical media on the network.Valid addresses are in the range 0-31. There may be more than one deviceunder the control of the same management interface. The default physicallayer initialization routine will scan the whole range of PHY devicesstarting from the one in <phyAddr>. If this parameter is"MII_PHY_NULL", the default physical layer initialization routine will findout the PHY actual address by scanning the whole range. The one with the lowestaddress will be chosen..IP  <phyDefMode>This parameter specifies the operating mode that will be set upby the default physical layer initialization routine in case allthe attempts made to establish a valid link failed. If that happens,the first PHY that matches the specified abilities will be chosen towork in that mode, and the physical link will not be tested..IP  <pAnOrderTbl>This parameter may be set to the address of a table that specifies theorder how different subsets of technology abilities should be advertised bythe auto-negotiation process, if enabled. Unless the flag <MOT_FCC_USR_PHY_TBL>is set in the userFlags field of the load string, the driver ignores thisparameter.The user does not normally need to specify this parameter, since the defaultbehaviour enables auto-negotiation process as described in IEEE 802.3u..IP  <userFlags>This field enables the user to give some degree of customization to thedriver.MOT_FCC_USR_PHY_NO_AN: the default physical layer initializationroutine will exploit the auto-negotiation mechanism as described inthe IEEE Std 802.3u, to bring a valid link up. According to it, allthe link partners on the media will take part to the negotiationprocess, and the highest priority common denominator technology abilitywill be chosen. It the user wishes to prevent auto-negotiation fromoccurring, he may set this bit in the user flags.MOT_FCC_USR_PHY_TBL: in the auto-negotiation process, PHYsadvertise all their technology abilities at the same time,and the result is that the maximum common denominator is used. However,this behaviour may be changed, and the user may affect the order howeach subset of PHY's abilities is negotiated. Hence, when theMOT_FCC_USR_PHY_TBL bit is set, the default physical layerinitialization routine will look at the motFccAnOrderTbl[] table andauto-negotiate a subset of abilities at a time, as suggested by thetable itself. It is worth noticing here, however, that if theMOT_FCC_USR_PHY_NO_AN bit is on, the above table will be ignored.MOT_FCC_USR_PHY_NO_FD: the PHY may be set to operate in full duplex mode,provided it has this ability, as a result of the negotiation with otherlink partners. However, in this operating mode, the FCC will ignore thecollision detect and carrier sense signals. If the user wishes not tonegotiate full duplex mode, he should set the MOT_FCC_USR_PHY_NO_FD bitin the user flags.MOT_FCC_USR_PHY_NO_HD: the PHY may be set to operate in half duplex mode,provided it has this ability, as a result of the negotiation with other linkpartners. If the user wishes not to negotiate half duplex mode, he shouldset the MOT_FCC_USR_PHY_NO_HD bit in the user flags.MOT_FCC_USR_PHY_NO_100: the PHY may be set to operate at 100Mbit/s speed,provided it has this ability, as a result of the negotiation withother link partners. If the user wishes not to negotiate 100Mbit/s speed,he should set the MOT_FCC_USR_PHY_NO_100 bit in the user flags.MOT_FCC_USR_PHY_NO_10: the PHY may be set to operate at 10Mbit/s speed,provided it has this ability, as a result of the negotiation withother link partners. If the user wishes not to negotiate 10Mbit/s speed,he should set the MOT_FCC_USR_PHY_NO_10 bit in the user flags.MOT_FCC_USR_PHY_ISO: some boards may have different PHYs controlled by thesame management interface. In some cases, there may be the need ofelectrically isolating some of them from the interface itself, in orderto guarantee a proper behaviour on the medium layer. If the user wishes toelectrically isolate all PHYs from the MII interface, he should set theMOT_FCC_USR_PHY_ISO bit. The default behaviour is to not isolate anyPHY on the board.MOT_FCC_USR_LOOP: when the MOT_FCC_USR_LOOP bit is set, the driver willconfigure the FCC to work in internal loopback mode, with the TX signaldirectly connected to the RX. This mode should only be used for testing.MOT_FCC_USR_RMON: when the MOT_FCC_USR_RMON bit is set, the driver willconfigure the FCC to work in RMON mode, thus collecting network statisticsrequired for RMON support without the need to receive all packets as inpromiscous mode.MOT_FCC_USR_BUF_LBUS: when the MOT_FCC_USR_BUF_LBUS bit is set, the driver willconfigure the FCC to work as though the data buffers were located in theCPM local bus.MOT_FCC_USR_BD_LBUS: when the MOT_FCC_USR_BD_LBUS bit is set, the driver willconfigure the FCC to work as though the buffer descriptors were located in theCPM local bus.MOT_FCC_USR_HBC: if the MOT_FCC_USR_HBC bit is set, the driver willconfigure the FCC to perform heartbeat check following end of transmissonand the HB bit in the status field of the TBD will be set if the collisioninput does not assert within the heartbeat window. The user does not normallyneed to set this bit..IP <Function Table>This is a pointer to the structure FCC_END_FUNCS. The stucture contains mostly FUNCPTRs that are used as a communication mechanism between the driver and theBSP. If the pointer contains a NULL value, the driver will use system defaultfunctions for the m82xxDpram DPRAM alloction and, obviously, the driver will not support BSP function calls for heart beat errors, disconnect errors, and PHY status changes tat are harware specific. .CS    FUNCPTR miiPhyInit; BSP Mii/Phy Init Function    This funtion pointer is initialized by the BSP and call by the driver to      initialize the mii driver. The driver sets up it's phy settings and then    calls this routine. The BSP is responsible for setting BSP specific phy     parameters and then calling the miiPhyInit. The BSP is responsible to set    up any call to an interrupt. See miiPhyInt bellow.     .CE.CS    FUNCPTR miiPhyInt; Driver Function for BSP to Call on a Phy Status Change    This function pointer is intialized by the driver and call by the BSP.    The BSP calls this function when it handles a hardware mii specific     interrupt. The driver initalizes this to the function motFccPhyLSCInt.    The BSP may or may not choose to call this funtion. It will depend if the     BSP supports an interrupt driven PHY. The BSP can also set up the miiLib     driver to poll. In this case the miiPhy diver calls this funtion. See the     miiLib for details.    Note: Not calling this function when the phy duplex mode changes will     result in a duplex mis-match. This will cause TX errors in the driver     and a reduction in throughput. .CE.CS    FUNCPTR miiPhyBitRead; MII Bit Read Funtion    This function pointer is intialized by the BSP and call by the driver.    The driver calls this function when it needs to read a bit from the mii     interface. The mii interface is hardware specific. .CE.CS    FUNCPTR miiPhyBitWrite; MII Bit Write Function    This function pointer is intialized by the BSP and call by the driver.