MEMORY {

//	.pflash (RX)  : ORIGIN = 0x0000, LENGTH = 0x7E00  # program flash memory
	.pflash (RX)  : ORIGIN = 0x0004, LENGTH = 0x7E00-4  # program flash memory
	.pram   (RWX) : ORIGIN = 0x7E00, LENGTH = 0x0200  # program ram memory
	.bflash (RX)  : ORIGIN = 0x8000, LENGTH = 0x0800  # boot flash memory
	.phole1 (RX)  : ORIGIN = 0x8800, LENGTH = 0x7800  # reserved program memory
	.avail  (RW)  : ORIGIN = 0x0000, LENGTH = 0x0030  # available
	.cwregs (RW)  : ORIGIN = 0x0030, LENGTH = 0x0010  # C temp registrs in CodeWarrior
	.data   (RW)  : ORIGIN = 0x0040, LENGTH = 0x0660  # data
	.stack  (RW)  : ORIGIN = 0x06A0, LENGTH = 0x0160  # stack
	.dhole1 (R)   : ORIGIN = 0x0800, LENGTH = 0x0400  # the first internal memory hole
	.regs   (RW)  : ORIGIN = 0x0C00, LENGTH = 0x0400  # periperal registers
	.xflash (R)   : ORIGIN = 0x1000, LENGTH = 0x1000  # data flash memory to place constant
	                                                  # and initialized values for data
	.dhole2 (R)   : ORIGIN = 0x2000, LENGTH = 0xDF80  # the second internal memory hole
	.onchip (RW)  : ORIGIN = 0xFF80, LENGTH = 0x0080  # on-chip core configuration registers

}

FORCE_ACTIVE {IV_Table,boot_start,Fiop,Fcrp}

SECTIONS {
	.main_Application :
	{

		*(Interrupt_Vector_Table.text)
		*(Setup.text)
		*(rtlib.text)
		*(.text)
		
	} > .pflash

	.flash_booting :
	{
		_boot_flash_start= .;

		*(Boot.text)

		_boot_flash_pgm_size= . - _boot_flash_start;
		F_ram_code_start_in_BFlash = .;
	} > .bflash

	.flash_operations : AT (ADDR(.bflash)+_boot_flash_pgm_size)
	{
		F_ram_code_start = .;
		_ram_start= .;

		# place your reloc. code here

		F_ram_code_size = . - _ram_start;
	} > .pram
	
	.main_application_constants :
	{
		_consts_start= .;
	
		#place your constants here. Ex.: const.c (.data)
	
		_consts_size= . - _consts_start;
		F_Xdata_start_in_ROM = .;
	} > .xflash
	
	.main_application_data : AT (ADDR(.xflash)+_consts_size)
	#init values of global variables are placed in xflash after constants
	{
		F_StackAddr    = ADDR(.stack);
		F_StackEndAddr = ADDR(.stack) + SIZEOF(.stack) / 2  - 1;
		F_Xdata_start_in_RAM = .;
		_data_start= .;
		* (.data)
		* (.bss)
		F_Xdata_size = . - _data_start;
	} > .data

	Fio = ADDR(.regs);
	Fcr = ADDR(.onchip);

}