?? traplog.tlg
字號:
Synthesizing work.top.gen
Synthesizing work.cmp_eq.cell_level
Synthesizing work.eq_element.eqn
Synthesizing virtex.muxcy_l.syn_black_box
Post processing for virtex.muxcy_l.syn_black_box
Post processing for work.eq_element.eqn
Post processing for work.cmp_eq.cell_level
Post processing for work.top.gen
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