#!/bin/csh -f
#---------------------------------------------------------- 
# Model Technology VHDL compiler script for the book     
# Digital Signal Processing with FPGAs
# Author-EMAIL: Uwe.Meyer-Baese@ieee.org
#---------------------------------------------------------- 

if ( ! -d work ) then
  vlib work
  echo "Library directory work created."
else
  echo "Library directory work found."
endif

if ( ! -d lpm ) then
  vlib lpm 
  echo "Library directory lpm created."
else
  echo "Library directory lpm found."
endif

echo Compile lpm package.
vcom -work lpm -explicit -quiet 220pack.vhd 220model.vhd

echo Compile chapter 1 entitys.
vcom -work lpm -quiet example.vhd fun_text.vhd

echo Compile chapter 2 components.  
vcom -work lpm -explicit -quiet csa7.vhd csa7cin.vhd
vcom -work lpm -explicit -quiet add_ff8.vhd add_ff8cin.vhd
echo Compile chapter 2 entitys. 
vcom -work lpm -explicit -quiet add_1p.vhd add_2p.vhd  
vcom -work lpm -explicit -quiet add_3p.vhd mul_ser.vhd
vcom -work lpm -explicit -quiet cordic.vhd 

echo Compile chapter 3 components.
vcom -work lpm -explicit -quiet case3.vhd case5p.vhd
vcom -work lpm -explicit -quiet case3s.vhd
echo Compile chapter 3 entitys. 
vcom -work lpm -explicit -quiet fir_gen.vhd fir_srg.vhd 
vcom -work lpm -explicit -quiet dafsm.vhd darom.vhd 
vcom -work lpm -explicit -quiet dasign.vhd dapara.vhd 

echo Compile chapter 4 entitys.
vcom -work lpm -explicit -quiet iir.vhd iir_pipe.vhd  
vcom -work lpm -explicit -quiet iir_par.vhd  

echo Compile chapter 5 entitys.
vcom -work lpm -explicit -quiet cic3r32.vhd cic3s32.vhd 
vcom -work lpm -explicit -quiet db4poly.vhd db4latti.vhd  

echo Compile chapter 6 entitys.
vcom -work lpm -explicit -quiet rader7.vhd ccmul.vhd
vcom -work lpm -explicit -quiet bfproc.vhd  

echo Compile chapter 7 entitys.
vcom -work lpm -explicit -quiet rader7.vhd ccmul.vhd 
vcom -work lpm -explicit -quiet bfproc.vhd