?? int.s
字號:
;/*
;***************************************************************************************************
;*
;* S3C44BOX ARM7TDMI MotherBoard
;*
;* (c) Copyright 2003-2015, Zhang Zhi-gang
;* All Rights Reserved
;*
;* S3C44BOX Initialization Program for 1.0
;*
;* File Name : INT.S
;* By Write : Zhang Zhi-gang ( Barry Zhang )
;* First Write : 2003-07-16 13:14
;* Last Write : 2004-02-24 13:14
;* where Write : Room B201 Shenzhen International Tech-innovation Academy, Kejinan 10 Road ,
;* High-Tech Industrial Park,Shenzhen,China.
;* Function : Advance Initialize
;* 1. Initialize ISR ,stacks
;* 2. Copy code
;* 3. Fill zeros into zero-initialized C-variables
;* 4. INT_Initialize
;***************************************************************************************************
;*/
;/*
;***************************************************************************************************
;* ARM & THUMB
;* If assembled with TASM the variable {CONFIG} will be set to 16
;* If assembled with ARMASM the variable {CONFIG} will be set to 32
;* Set the variable THUMB to TRUE or false depending on whether the
;* file is being assembled with TASM or ARMASM.
;***************************************************************************************************
;*/
GET 2410ADDR.S
GET INTDEF.S
CODE32
IMPORT SDC_LISR
;// IMPORT TPLCD_LISR
;/*
;***************************************************************************************************
;* INTERRUPT TABLES
;*
;* Define vector table used by INT_IRQ to branch to necessary ISR
;*
;***************************************************************************************************
;*/
AREA INT_IRQ_segment, DATA, READWRITE
INT_IRQ_Vectors
DCD 0 ;// Vector 00
DCD 0 ;// Vector 01
DCD 0 ;// Vector 02
DCD 0 ;// Vector 03
DCD 0 ;// Vector 04
DCD 0 ;// Vector 05
DCD 0 ;// Vector 06
DCD 0 ;// Vector 07
DCD 0 ;// Vector 08
DCD 0 ;// Vector 09
DCD 0 ;// Vector 10
DCD 0 ;// Vector 11
DCD 0 ;// Vector 12
DCD 0 ;// Vector 13
DCD 0 ;// Vector 14
DCD 0 ;// Vector 15
DCD 0 ;// Vector 16
DCD 0 ;// Vector 17
DCD 0 ;// Vector 18
DCD 0 ;// Vector 19
DCD 0 ;// Vector 20
DCD 0 ;// Vector 21
DCD 0 ;// Vector 22
DCD INT_UART_Shell ;// Vector 23
DCD 0 ;// Vector 24
DCD 0 ;// Vector 25
DCD 0 ;// Vector 26
DCD 0 ;// Vector 27
DCD INT_UART_Shell ;// Vector 28
DCD 0 ;// Vector 29
DCD 0 ;// Vector 30
DCD 0 ;// Vector 31
; //Define the order in which the interrupts will be executed by software (INT_IRQ)
INT_IRQ_Priority
;//DCD Handler_GLOBAL ;// Vector 00
DCD Handler_EINT0 ;// Vector 00
DCD Handler_EINT1 ;// Vector 01
DCD Handler_EINT2 ;// Vector 02
DCD Handler_EINT3 ;// Vector 03
DCD Handler_EINT4_7 ;// Vector 04
DCD Handler_EINT8_23 ;// Vector 05
DCD 6
DCD Handler_nBATT_FLT ;// Vector 07
DCD Handler_TICK ;// Vector 08
DCD Handler_WDT ;// Vector 09
DCD Handler_TIMER0 ;// Vector 10
DCD Handler_TIMER1 ;// Vector 11
DCD Handler_TIMER2 ;// Vector 12
DCD Handler_TIMER3 ;// Vector 13
DCD Handler_TIMER4 ;// Vector 14
DCD Handler_UART2 ;// Vector 15
DCD Handler_LCD ;// Vector 16
DCD Handler_DMA0 ;// Vector 17
DCD Handler_DMA1 ;// Vector 18
DCD Handler_DMA2 ;// Vector 19
DCD Handler_DMA3 ;// Vector 20
DCD Handler_SDI ;// Vector 21
DCD Handler_SPI0 ;// Vector 22
DCD Handler_UART1 ;// Vector 23
DCD 24
DCD Handler_USBD ;// Vector 25
DCD Handler_USBH ;//VECTOR 26
DCD Handler_IIC ;//VECTOR 27
DCD Handler_UART0 ;//VECTOR 28
DCD Handler_SPI1 ;//VECTOR 29
DCD Handler_RTC ;//VECTOR 30
DCD Handler_ADC ;//VECTOR 31
IRQ_PRIORITY_END
;/*
;***************************************************************************************************
;* 引入連接器生成的代碼始末地址
;*
;***************************************************************************************************
;*/
AREA INT_CODE, CODE, READONLY
BSS_Start_Ptr
IMPORT |Image$$ZI$$Base|
DCD |Image$$ZI$$Base|
BSS_End_Ptr
IMPORT |Image$$ZI$$Limit|
DCD |Image$$ZI$$Limit|
ROM_Data_Start_Ptr
IMPORT |Image$$RO$$Limit|
DCD |Image$$RO$$Limit|
RAM_Start_Ptr
IMPORT |Image$$RW$$Base|
DCD |Image$$RW$$Base|
;//Current_Thread
;// DCD TCD_Current_Thread
;/*
;***************************************************************************************************
;* INT_Intialize
;*
;* Function : Intialize
;* DESCRIPTION:
;* This function sets up the global system stack variable and
;* transfers control to the target independent initialization
;* function INC_Initialize. Responsibilities of this function
;* include the following:
;* - Setup necessary processor/system control registers
;* - Initialize the vector table
;* - Setup the system stack pointers
;* - Setup the timer interrupt
;* - Calculate the timer HISR stack and priority
;* - Calculate the first available memory address
;* - Transfer control to INC_Initialize to initialize all of
;* the system components.
;*
;* Returns :
;*
;***************************************************************************************************
;*/
EXPORT INT_Intialize
INT_Intialize
;/*
;***************************************************************************************************
;* Copy the code from ROM to the RAM
;*
;***************************************************************************************************
;*/
LDR r0,ROM_Data_Start_Ptr ;// Get the start of the
LDR r1,RAM_Start_Ptr ;// Get the start of the
LDR r3,BSS_Start_Ptr ;// Pickup the start of
CMP r0,r1 ;// Check for any initial
;// variable values
BEQ INT_BSS_Clear ;// If none, zero memory
INT_ROM_Vars_Copy
CMP r1,r3 ;// Check to set flags
LDRCC r2, [r0], #4 ;// Get value from ROM
STRCC r2, [r1], #4 ;// Put value in RAM
BCC INT_ROM_Vars_Copy ;// Continue
INT_BSS_Clear
LDR r1,BSS_End_Ptr ;// Pickup the end of the BSS area
MOV r2,#0 ;// Clear value in r2
INT_BSS_Clear_Loop
CMP r3,r1 ;// Are the start and end equal?
STRCC r2,[r3],#4 ;// Clear a word
BCC INT_BSS_Clear_Loop ;// If so, continue with BSS clear
;/*
;***************************************************************************************************
;* Initialize the system stack pointers
;* 初始化堆棧
;*
;***************************************************************************************************
;*/
;// 初始化Sys模式下的堆棧
LDR SP,=SYS_STACK
;// 初始化IRQ模式下的堆棧
MRS r0,CPSR ;// Pickup current CPSR
BIC r0,r0,#MODE_MASK ;// Clear the mode bits
ORR r0,r0,#MODE_IRQ ;// Set the IRQ mode bits
MSR CPSR_cxsf,r0 ;// Move to IRQ mode
LDR SP,=IRQ_STACK ;// Setup IRQ stack pointer
;// 初始化SUP模式下的堆棧
MRS r0,CPSR ;// Pickup current CPSR
BIC r0,r0,#MODE_MASK ;// Clear the mode bits
ORR r0,r0,#MODE_SUP ;// Set the SUP mode bits
MSR CPSR_cxsf,r0 ;// Move to SUP mode
LDR SP,=SVC_STACK ;// Setup SUP stack pointer
;// 轉回系統模式，并使能中斷標志位
MRS r0,CPSR ;// Pickup current CPSR
BIC r0,r0,#MODE_MASK ;// Clear mode bits
ORR r0,r0,#MODE_SYS ;// Set the SYSTEM mode bits
BIC R0,R0,#INTLOCK ;// 開中斷
MSR CPSR_cxsf,r0 ;// All interrupt stacks are setup,
;// return to supervisor mode
;/*
;***************************************************************************************************
; C語言的調用（跳至應用程序）
;***************************************************************************************************
;*/
IMPORT C_Entry
B C_Entry ;C_Entry是一個循環程序
;/*
;***************************************************************************************************
;* INT_IRQ
;*
;***************************************************************************************************
;*/
AREA IRQ,CODE,READONLY
EXPORT INT_IRQ
INT_IRQ
;/* This Code is used to correctly handle interrupts and
; is necessary due to the nature of the ARM7 architecture */
STMDB sp!, {r1} ;保存寄存器r1，將r1壓棧
MRS r1, SPSR
TST r1, #I_BIT
LDMIA sp!, {r1}
SUBNES pc,lr,#4
;//LR_IRQ,SPSR_IRQ壓棧來避免下一次中斷發生使它們被沖掉
SUB lr, lr, #4
STMFD sp!, {lr}
MRS r14, SPSR
STMFD sp!, {r0-r4, r14}
;// 查寄存器INTOFFSET找出對應的中斷
LDR R0,=INTOFFSET
LDR R0,[R0,#0]
;//判斷是否有中斷發生
LDR R1,=INTPND
LDR R1,[R1]
CMP R1,#0X0
BNE IRQ_VECTOR_FOUND
;// No bits in pending register set, restore context and exit interrupt servicing
LDMIA SP!,{R0-R4,R14}
MSR SPSR_csxf,R14
LDMIA SP!,{PC}^
;//清中斷控制源
IRQ_VECTOR_FOUND
;//屏蔽中斷,才能清除中斷位
LDR R1,=INTSUBMSK
LDR R7,[R1] ;//保存到R7,以便恢復
LDR R2,=0x7ff
STR R2,[R1] ;//設置 INTSUBMSK,以屏蔽中斷
LDR R1,=INTMSK
LDR R8,[R1] ;//保存到R8,以便恢復
;//設置 INTMSK,以屏蔽中斷
LDR R2,=0xffffffff
STR R2,[R1]
;//清中斷
LDR R1,=SRCPND
LDR R3,[R1]
STR R3,[R1,#0]
LDR R2,=INTPND
LDR R3,[R2,#0]
STR R3,[R2,#0]
LDR R2,=SUBSRCPND
LDR R3,[R2,#0]
STR R3,[R2]
;//恢復INTSUBMSK
LDR R1,=INTSUBMSK
STR R7,[R1]
;//設置 INTMSK,以便恢復
LDR R1,=INTMSK
STR R8,[R1]
;// Get IRQ vector table address
LDR r3,=INT_IRQ_Vectors ;// Get IRQ vector table address
MOV r2, r0, LSL #2 ;// Multiply vector by 4 to get offset into table
ADD r3, r3, r2 ;// Adjust vector table address to correct offset
LDR r2, [r3,#0] ;// Load branch address from vector table
MOV PC, r2 ;// Jump to correct branch location based on vector table
;/*
;***************************************************************************************************
;* INT_EINT0_Shell
;*
;***************************************************************************************************
;*/
EXPORT INT_UART_Shell
INT_UART_Shell
MRS r1,CPSR ;// Pickup current CPSR
BIC r1,r1,#MODE_MASK ;// Clear the mode bits
ORR r1,r1,#MODE_SYS ;// Set the SYS mode bits
ORR r1,r1,#I_BIT ;//DISABLE INT
MSR CPSR_cxsf,r1 ;// Change to IRQ mode
;// MOV r4,lr ;// Put IRQ return address into r4
;// 跳至上下文保存處理程序
STMDB SP!,{LR}
;// 跳至中斷服務程序
BL SDC_LISR ;// processing.
;//
LDMIA SP!,{LR}
;// 返回到IRQ模式
MRS r1,CPSR ;// Pickup current CPSR
BIC r1,r1,#MODE_MASK ;// Clear the mode bits
ORR r1,r1,#MODE_IRQ ;// Set the IRQ mode bits
BIC R1,R1,#I_BIT ;//ENABLE INT
MSR CPSR_cxsf,r1 ;// Change to IRQ mode
;//此值是在進入IRQ時設置的
LDMIA SP!,{R0-R4,R14}
MSR SPSR_csxf,R14
LDMIA SP!,{PC}^
END ?? 快捷鍵說明
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