/*---------------------------------------------------------------------------- 
COPYRIGHT (c) 1997 by Philips Semiconductors

THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY ONLY BE USED AND COPIED IN 
ACCORDANCE WITH THE TERMS AND CONDITIONS OF SUCH A LICENSE AND WITH THE 
INCLUSION OF THE THIS COPY RIGHT NOTICE. THIS SOFTWARE OR ANY OTHER COPIES 
OF THIS SOFTWARE MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY OTHER
PERSON. THE OWNERSHIP AND TITLE OF THIS SOFTWARE IS NOT TRANSFERRED. 

THE INFORMATION IN THIS SOFTWARE IS SUBJECT TO CHANGE WITHOUT ANY PRIOR NOTICE
AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY Philips Semiconductor. 

PHILIPS ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF THIS SOFTWARE
ON PLATFORMS OTHER THAN THE ONE ON WHICH THIS SOFTWARE IS FURNISHED.
----------------------------------------------------------------------------*/
/*
	HISTORY
	#define	TR	Tilakraj Roy
	960510	TR 	Created
	961019	TR	Moved the CTC 1.1 bug fix in IRQGen from IRQAck.
	970521	TR	Rewrote for Generic Target TMMan
	
*/

/*----------------------------------------------------------------------------
          SYSTEM INCLUDE FILES
----------------------------------------------------------------------------*/
/* tm1 specific includes */
#include "ops/custom_defs.h"
#include "ops/custom_ops.h"
#include "tm1/mmio.h"
#include "tm1/tmInterrupts.h"
#include "tmlib/AppModel.h"

/*----------------------------------------------------------------------------
          DRIVER SPECIFIC INCLUDE FILES
----------------------------------------------------------------------------*/
#include "tmmanlib.h"
#include "tmmanapi.h"
#include "tmmanerr.h"
#include "platform.h"
/* #include "dprintf.h" */

typedef struct tagHalObject
{
    UInt32	TMDeviceVendorID;
	UInt32	TMSubsystemID;
	UInt32	TMClassRevisionID;
    UInt32	BridgeDeviceVendorID;
    UInt32	BridgeSubsystemID;
	UInt32	BridgeClassRevisionID;

	UInt8* MMIOBase;
	UInt32 MMIOLength;
	UInt8* SDRAMBase;
	UInt32 SDRAMLength;
	UInt8* MMIOMapped;
	UInt8* SDRAMMapped;
	UInt32 SelfInterrupt;
	UInt32 PeerInterrupt;
	HalInterruptHandler Handler;
	Pointer	Context;
	HalControl*	Control;
	UInt32	PeerMajorVersion;
	UInt32	PeerMinorVersion;
	UInt32	SpeculativeLoadFix;
	UInt32	MemoryAccessInterruptState;
}	HalObject;

/* GLOBALS */

#define		HalFourCC		tmmanOBJECTID ( 'H', 'A', 'L', ' ' )

/* 
this crap is required since TM hardware cannot 
return a registered context in an interrupt 
*/
#define		constMaxInterruptHandlers	constTMManBoardCount

extern UInt32* Host2TargetIntPtr;
extern UInt32* Target2HostIntPtr;

/*
#define	PROTOTYPEhalHardwareInterruptHandler(x) \
void halHardwareInterruptHandler##x ( void );


#define	BEGINhalHardwareInterruptHandler(x) \
void halHardwareInterruptHandler##x ( void ) \
{ \
	HalObject*	Hal = HalInterruptContextTable[x];
	#define	ENDhalHardwareInterruptHandler \
	AppModel_suspend_scheduling (); \
	halDisableIRQ ( (UInt32)Hal ); \
	Hal->Handler ( Hal->Context ); \
	halEnableIRQ ( (UInt32)Hal ); \
	AppModel_resume_scheduling (); \
}


PROTOTYPEhalHardwareInterruptHandler(0);
PROTOTYPEhalHardwareInterruptHandler(1);
PROTOTYPEhalHardwareInterruptHandler(2);
PROTOTYPEhalHardwareInterruptHandler(3);
PROTOTYPEhalHardwareInterruptHandler(4);
*/

static	Pointer HalGlobal = 0;

void halHardwareInterruptHandler ( void ) 
{ 
	HalObject*	Hal = HalGlobal;
	#pragma	TCS_handler

	AppModel_suspend_scheduling ();
	AppModel_run_on_sstack( (Pointer)Hal->Handler, (Pointer)Hal->Context );
	AppModel_resume_scheduling ();
}

/*
	this is neeed since we have no way of determining
	whcih processor generated the interrupt.
	so we install seperate interrupt handlers for each procesor.
	and the context that these interrupt handlers have to refer to
	are hardcoded in the functions themselves.
*/


static	Pointer HalInterruptContextTable[constMaxInterruptHandlers];
/*
static	Pointer HalInterruptHandlerTable[constMaxInterruptHandlers] = 
{
	(Pointer)halHardwareInterruptHandler0,
	(Pointer)halHardwareInterruptHandler1,
	(Pointer)halHardwareInterruptHandler2,
	(Pointer)halHardwareInterruptHandler3,
	(Pointer)halHardwareInterruptHandler4
};
*/
/* FUNCTION IMPLEMENTATION */
/*
	This function assumes that the host has already set the mmio regiters to 
	their proper values. So we just read them in order to initialize our data
	structures.
*/
TMStatus	halCreate ( 
	Pointer Parameters,
	UInt32* HalHandlePointer )
{
	TMStatus		StatusCode;
	HalObject*	Hal;
	intInstanceSetup_t	Setup;
	UInt32 gpiojMod2;

	/*
	Pointer InterruptHandler = 
		HalInterruptHandlerTable[((halParameters*)Parameters)->DSPNumber];
	*/
	if ( ( Hal = objectAllocate ( 
		sizeof ( HalObject ),
		HalFourCC ) ) == Null )
	{
		StatusCode = statusObjectAllocFail; 
		goto halCreateExit1;
	}

/* NM added change */
/* Due to an interaction with the new GPIO facilities of TM2, the MMIO register 
GPIOJ_MOD2 must be programmed to enable 'regular-function' of the imaginary 'J21' 
pin, which is actually PCI INTA.  See TM2 Databook 29.11 for details.   */

#ifndef GPIOJ_MOD2
#define  GPIOJ_MOD2 0x104194
#endif

    gpiojMod2 = MMIO(GPIOJ_MOD2);
    gpiojMod2 &= 0xfffff3ff;
    gpiojMod2 |= 0xc00;
    MMIO(GPIOJ_MOD2) = gpiojMod2;
/* End of NM added change */
	Hal->MMIOBase = Hal->MMIOMapped = ((halParameters*)Parameters)->MMIOBase;
	Hal->MMIOLength			= ((halParameters*)Parameters)->MMIOLength;
	Hal->SelfInterrupt		= ((halParameters*)Parameters)->TMIrq;
	Hal->PeerInterrupt		= ((halParameters*)Parameters)->PCIIrq;

    Hal->TMDeviceVendorID = ((halParameters*)Parameters)->TMDeviceVendorID;
	Hal->TMSubsystemID = ((halParameters*)Parameters)->TMSubsystemID;
	Hal->TMClassRevisionID = ((halParameters*)Parameters)->TMClassRevisionID;

    Hal->BridgeDeviceVendorID = ((halParameters*)Parameters)->BridgeDeviceVendorID;
    Hal->BridgeSubsystemID = ((halParameters*)Parameters)->BridgeSubsystemID;
	Hal->BridgeClassRevisionID = ((halParameters*)Parameters)->BridgeClassRevisionID;

	Hal->Control			= ((halParameters*)Parameters)->SharedData;
	Hal->SpeculativeLoadFix	= ((halParameters*)Parameters)->SpeculativeLoadFix;

	Hal->SDRAMBase = Hal->SDRAMMapped = 
		(UInt8 *)(*(UInt32*)( Hal->MMIOBase + DRAM_BASE));
	Hal->SDRAMLength		= (*(UInt32*)( Hal->MMIOBase + DRAM_LIMIT)) -
		(*(UInt32*)( Hal->MMIOBase + DRAM_BASE));

	HalGlobal = Hal;

	Target2HostIntPtr = &Hal->Control->TargetInterruptSpinLock;
	Host2TargetIntPtr = &Hal->Control->HostInterruptSpinLock;

	if ( intOpen ( (intInterrupt_t)Hal->SelfInterrupt ) != 0 )
	{
		StatusCode = statusHalAllocInterruptFail;
		goto	halCreateExit2;
	}

	Setup.enabled = True;
	Setup.handler = halHardwareInterruptHandler;
	Setup.level_triggered = False;
	Setup.priority = intPRIO_0;

	if ( intInstanceSetup (
		(intInterrupt_t)Hal->SelfInterrupt, /* HOST INTERRUPTING US */
		&Setup ) != 0 )
	{
		StatusCode = statusHalConnectInterruptFail;
		goto	halCreateExit3;
	}


	*HalHandlePointer = (UInt32)Hal;

	return statusSuccess;	

halCreateExit3:
	intClose (  (intInterrupt_t)Hal->SelfInterrupt );

halCreateExit2:
	objectFree( Hal );

halCreateExit1:
	return StatusCode;

}

TMStatus	halDestroy ( UInt32 HalHandle )
{
	HalObject*	Hal = (HalObject*)HalHandle;

#ifdef DEBUG
	if ( objectValidate ( Hal, HalFourCC ) != True )
	{
		return statusInvalidHandle;
	}
#endif

	intClose (  (intInterrupt_t)Hal->SelfInterrupt );
	objectFree( Hal );
	return statusSuccess;
}

TMStatus	halGetMMIOInfo (
	UInt32	HalHandle,
	Pointer *MMIOPhysical, 
	Pointer *MMIOMapped, 
	UInt32 *MMIOSize )

{
	HalObject*	Hal = (HalObject*)HalHandle;
#ifdef DEBUG
	if ( objectValidate ( Hal, HalFourCC ) != True )
	{
		return statusInvalidHandle;
	}
#endif

	*MMIOPhysical = Hal->MMIOBase;
	*MMIOMapped = Hal->MMIOMapped;
	*MMIOSize = Hal->MMIOLength;
	return statusSuccess;
}

TMStatus	halGetSDRAMInfo ( 
	UInt32	HalHandle,
	Pointer *SDRAMPhysical, 
	Pointer *SDRAMMapped, 
	UInt32 *SDRAMSize )
{
	HalObject*	Hal = (HalObject*)HalHandle;

#ifdef DEBUG
	if ( objectValidate ( Hal, HalFourCC ) != True )
	{
		return statusInvalidHandle;
	}
#endif

	*SDRAMPhysical = Hal->SDRAMBase;
	*SDRAMMapped = Hal->SDRAMMapped;
	*SDRAMSize = Hal->SDRAMLength;
	return statusSuccess;

}

TMStatus	halGetTMPCIInfo ( 
	UInt32	HalHandle,
	UInt32* DeviceVendorID,
	UInt32* SubsystemID,
	UInt32* ClassRevisionID )
{
	HalObject*	Hal = (HalObject*)HalHandle;
#ifdef DEBUG
	if ( objectValidate ( Hal, HalFourCC ) != True )
	{
		DPF(0,("tmman:halGetTMPCIInfo:objectValidate:FAIL\n" ));
		return statusInvalidHandle;
	}
#endif

	*DeviceVendorID = Hal->TMDeviceVendorID;
	*SubsystemID = Hal->TMSubsystemID;
	*ClassRevisionID = Hal->TMClassRevisionID;

	return statusSuccess;
}

TMStatus	halGetBridgePCIInfo ( 
	UInt32	HalHandle,
	UInt32* DeviceVendorID,
	UInt32* SubsystemID,
	UInt32* ClassRevisionID )
{
	HalObject*	Hal = (HalObject*)HalHandle;

#ifdef DEBUG
	if ( objectValidate ( Hal, HalFourCC ) != True )
	{
		DPF(0,("tmman:halGetBridgePCIInfo:objectValidate:FAIL\n" ));
		return statusInvalidHandle;
	}
#endif
	*DeviceVendorID = Hal->BridgeDeviceVendorID;
	*SubsystemID = Hal->BridgeSubsystemID;
	*ClassRevisionID = Hal->BridgeClassRevisionID;


	return statusSuccess;
}

TMStatus	halInstallHandler ( 
	UInt32	HalHandle,
	HalInterruptHandler Handler, 
	Pointer Context )
{