?? hwctxt.cpp
字號:
{
PBYTE pVirtDMABufferAddr = NULL;
DMA_ADAPTER_OBJECT Adapter;
memset(&Adapter, 0, sizeof(DMA_ADAPTER_OBJECT));
Adapter.InterfaceType = Internal;
Adapter.ObjectSize = sizeof(DMA_ADAPTER_OBJECT);
// Allocate a block of virtual memory (physically contiguous) for the DMA buffers.
//
pVirtDMABufferAddr = (PBYTE)HalAllocateCommonBuffer(&Adapter, (AUDIO_DMA_PAGE_SIZE * 4), &g_PhysDMABufferAddr, FALSE);
if (pVirtDMABufferAddr == NULL)
{
RETAILMSG(TRUE, (TEXT("WAVEDEV.DLL:HardwareContext::MapDMABuffers() - Failed to allocate DMA buffer.\r\n")));
return(FALSE);
}
// Setup the DMA page pointers.
// NOTE: Currently, input and output each have two DMA pages: these pages are used in a round-robin
// fashion so that the OS can read/write one buffer while the audio codec chip read/writes the other buffer.
//
m_Output_pbDMA_PAGES[0] = pVirtDMABufferAddr;
m_Output_pbDMA_PAGES[1] = pVirtDMABufferAddr + AUDIO_DMA_PAGE_SIZE;
m_Input_pbDMA_PAGES[0] = pVirtDMABufferAddr + (2 * AUDIO_DMA_PAGE_SIZE);
m_Input_pbDMA_PAGES[1] = pVirtDMABufferAddr + (3 * AUDIO_DMA_PAGE_SIZE);
return(TRUE);
}
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: UnmapDMABuffers()
Description: Unmaps the DMA buffers used for audio input/output
on the I2S bus.
Returns: Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::UnmapDMABuffers()
{
if(m_Output_pbDMA_PAGES[0])
{
VirtualFree((PVOID)m_Output_pbDMA_PAGES[0], 0, MEM_RELEASE);
}
return TRUE;
}
BOOL HardwareContext::Codec_channel()
{
UCHAR status = UDA1341_STATUS_B | UDA1341_STATUS_IGS; //enable 6dB mic boost
// which parts to turn on?
if (m_InputDMARunning) {
status |= UDA1341_STATUS_PWR_ADC; // turn on ADC
}
if (m_OutputDMARunning) {
status |= UDA1341_STATUS_PWR_DAC; // turn on DAC
}
//****** Port B Initialize *****
g_pIOPregs->GPBDAT |= L3M|L3C; //start condition : L3M=H, L3C=H
g_pIOPregs->GPBUP |= 0x1c; //pull-up disable
g_pIOPregs->GPBCON = ((g_pIOPregs->GPBCON & 0x3ffc0f) | 0x000150);
WriteL3Addr(UDA1341_ADDR_STATUS);
WriteL3Data(status, 0);
return(TRUE);
}
MMRESULT HardwareContext::SetOutputGain (DWORD dwGain)
{
m_dwOutputGain = dwGain & 0xffff; // save off so we can return this from GetGain - but only MONO
// convert 16-bit gain to 5-bit attenuation
UCHAR ucGain;
if (m_dwOutputGain == 0) {
ucGain = 0x3F; // mute: set maximum attenuation
}
else {
ucGain = (UCHAR) ((0xffff - m_dwOutputGain) >> 11); // codec supports 64dB attenuation, we'll only use 32
}
ASSERT((ucGain & 0xC0) == 0); // bits 6,7 clear indicate DATA0 in Volume mode.
WriteL3Addr(UDA1341_ADDR_DATA0);
WriteL3Data(ucGain, 0);
return MMSYSERR_NOERROR;
}
MMRESULT HardwareContext::SetOutputMute (BOOL fMute)
{
m_fOutputMute = fMute;
WriteL3Addr(UDA1341_ADDR_DATA0);
WriteL3Data(fMute ? 0x84 : 0x80, 0); // DATA0: 0x80 + fMute << 2
return MMSYSERR_NOERROR;
}
BOOL HardwareContext::GetOutputMute (void)
{
return m_fOutputMute;
}
DWORD HardwareContext::GetOutputGain (void)
{
return m_dwOutputGain;
}
BOOL HardwareContext::GetInputMute (void)
{
return m_fInputMute;
}
MMRESULT HardwareContext::SetInputMute (BOOL fMute)
{
m_fInputMute = fMute;
return m_InputDeviceContext.SetGain(fMute ? 0: m_dwInputGain);
}
DWORD HardwareContext::GetInputGain (void)
{
return m_dwInputGain;
}
MMRESULT HardwareContext::SetInputGain (DWORD dwGain)
{
m_dwInputGain = dwGain;
if (! m_fInputMute) {
m_InputDeviceContext.SetGain(dwGain);
}
return MMSYSERR_NOERROR;
}
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: InitCodec()
Description: Initializes the audio codec chip.
Notes: The audio codec chip is intialized for output mode
but powered down. To conserve battery life, the chip
is only powered up when the user starts playing a
file.
Specifically, the powerup/powerdown logic is done
in the AudioMute() function. If either of the
audio channels are unmuted, then the chip is powered
up; otherwise the chip is powered own.
Returns: Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::InitCodec()
{
DEBUGMSG(ZONE_FUNCTION, (TEXT("+++InitCodec\n")));
//****** Port B Initialize *****
g_pIOPregs->GPBDAT |= L3M|L3C; //start condition : L3M=H, L3C=H
g_pIOPregs->GPBUP |= 0x1c; //pull-up disable
g_pIOPregs->GPBCON = ((g_pIOPregs->GPBCON & 0x3ffc0f) | 0x000150);
// Reset codec internal registers by toggling the status register reset bit
WriteL3Addr(UDA1341_ADDR_STATUS);
WriteL3Data(UDA1341_STATUS_RESET | UDA1341_STATUS_CLK384,0);
WriteL3Addr(UDA1341_ADDR_STATUS);
WriteL3Data(UDA1341_STATUS_CLK384,0);
// set default gain, power state
WriteL3Addr(UDA1341_ADDR_STATUS);
WriteL3Data(UDA1341_STATUS_B | UDA1341_STATUS_IGS | UDA1341_STATUS_PWR_DAC,0);
// extended address:
WriteL3Addr(UDA1341_ADDR_DATA0);
WriteL3Data(0xC2,0); //11000,010 : DATA0, Extended addr(010)
WriteL3Data(0xef,0); //111,011,11 : DATA0, MS=+9dB, MixerMode=both(1)
// disable AGC
WriteL3Addr(UDA1341_ADDR_DATA0);
WriteL3Data(0xC4,0); //11000,100 : DATA0, Extended addr(100)
WriteL3Data(0xe0,0); //111,000,00 : DATA0, AGC=Off, IG[0,1]=0
WriteL3Addr(UDA1341_ADDR_DATA0);
WriteL3Data(0xC4,0); //11000,101 : DATA0, Extended addr(101)
WriteL3Data(0xe8,0); //111,01000 : DATA0, IG[6:2]=01000
return(TRUE);
}
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: InitOutputDMA()
Description: Initializes the DMA channel for output.
Notes: DMA Channel 2 is used for transmitting output sound
data from system memory to the I2S controller.
Returns: Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::InitOutputDMA()
{
//----- 1. Initialize the DMA channel for output mode and use the first output DMA buffer -----
if (!g_PhysDMABufferAddr.LowPart)
{
DEBUGMSG(TRUE, (TEXT("ERROR:HardwareContext::InitOutputDMA: Invalid DMA buffer physical address.\r\n")));
return(FALSE);
}
g_pDMAregs->DISRC2 = (int)(g_PhysDMABufferAddr.LowPart);
g_pDMAregs->DISRCC2 &= ~(SOURCE_PERIPHERAL_BUS | FIXED_SOURCE_ADDRESS); // Source is system bus, increment addr
//----- 2. Initialize the DMA channel to send data over the I2S bus -----
g_pDMAregs->DIDST2 = (int)(S3C2440A_BASE_REG_PA_IISBUS+0x10);
g_pDMAregs->DIDSTC2 |= (DESTINATION_PERIPHERAL_BUS | FIXED_DESTINATION_ADDRESS); // Dest is periperal bus, fixed addr
//----- 3. Configure the DMA channel's transfer characteristics: handshake, sync PCLK, interrupt, -----
// single tx, single service, I2SSDO, I2S request, no auto-reload, half-word, tx count
g_pDMAregs->DCON2 = ( HANDSHAKE_MODE | GENERATE_INTERRUPT | I2SSDO_DMA2 | DMA_TRIGGERED_BY_HARDWARE
| TRANSFER_HALF_WORD | (AUDIO_DMA_PAGE_SIZE / 2) );
//----- 4. Reset the playback pointers -----
AUDIO_RESET_PLAYBACK_POINTER();
DEBUGMSG(ZONE_FUNCTION,(TEXT("---InitOutputDMA\n")));
return TRUE;
}
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: StartOutputDMA()
Description: Starts outputting the sound data to the audio codec
chip via DMA.
Notes: Currently, both playback and record share the same
DMA channel. Consequently, we can only start this
operation if the input channel isn't using DMA.
Returns: Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::StartOutputDMA()
{
DEBUGMSG(ZONE_FUNCTION,(TEXT("+++StartOutputDMA\n")));
if(!m_OutputDMARunning)
{
//----- 1. Initialize our buffer counters -----
m_OutputDMARunning=TRUE;
m_OutBytes[OUT_BUFFER_A]=m_OutBytes[OUT_BUFFER_B]=0;
//----- 2. Prime the output buffer with sound data -----
m_OutputDMAStatus = (DMA_DONEA | DMA_DONEB) & ~DMA_BIU;
ULONG OutputTransferred = TransferOutputBuffers(m_OutputDMAStatus);
//----- 3. If we did transfer any data to the DMA buffers, go ahead and enable DMA -----
if(OutputTransferred)
{
//----- 4. Configure the DMA channel for playback -----
if(!InitOutputDMA())
{
DEBUGMSG(ZONE_ERROR, (TEXT("HardwareContext::StartOutputDMA() - Unable to initialize output DMA channel!\r\n")));
goto START_ERROR;
}
g_pIISregs->IISCON |= TRANSMIT_DMA_REQUEST_ENABLE;
g_pIISregs->IISCON &= ~TRANSMIT_IDLE_CMD;
g_pIISregs->IISFCON |= ( TRANSMIT_FIFO_ACCESS_DMA | TRANSMIT_FIFO_ENABLE );
g_pIISregs->IISMOD |= IIS_TRANSMIT_MODE;
//----- 5. Make sure the audio isn't muted -----
AudioMute(DMA_CH_OUT, FALSE);
//----- 6. Start the DMA controller -----
AUDIO_RESET_PLAYBACK_POINTER();
SELECT_AUDIO_DMA_OUTPUT_BUFFER_A();
Codec_channel(); // Turn ON output channel
// charlie, start A buffer
AUDIO_OUT_DMA_ENABLE();
// wait for DMA to start.
while((g_pDMAregs->DSTAT2&0xfffff)==0);
// change the buffer pointer
SELECT_AUDIO_DMA_OUTPUT_BUFFER_B();
// Set DMA for B Buffer
}
else // We didn't transfer any data, so DMA wasn't enabled
{
m_OutputDMARunning=FALSE;
}
}
DEBUGMSG(ZONE_FUNCTION,(TEXT("---StartOutputDMA\n")));
return TRUE;
START_ERROR:
return FALSE;
}
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: StopOutputDMA()
Description: Stops any DMA activity on the output channel.
Returns: Boolean indicating success
-------------------------------------------------------------------*/
void HardwareContext::StopOutputDMA()
{
//----- 1. If the output DMA is running, stop it -----
if (m_OutputDMARunning)
{
m_OutputDMAStatus = DMA_CLEAR;
AUDIO_OUT_DMA_DISABLE();
AUDIO_OUT_CLEAR_INTERRUPTS();
g_pIISregs->IISCON &= ~TRANSMIT_DMA_REQUEST_ENABLE;
g_pIISregs->IISCON |= TRANSMIT_IDLE_CMD;
g_pIISregs->IISFCON &= ~( TRANSMIT_FIFO_ACCESS_DMA | TRANSMIT_FIFO_ENABLE );
g_pIISregs->IISMOD &= ~IIS_TRANSMIT_MODE;
AudioMute(DMA_CH_OUT, TRUE);
}
m_OutputDMARunning = FALSE;
Codec_channel();
}
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: InitInputDMA()
Description: Initializes the DMA channel for input.
Notes: ***** NOT IMPLEMENTED *****
The following routine is not implemented due to a
hardware bug in the revision of the Samsung SC2440
CPU this driver was developed on. See the header
at the top of this file for details.
Returns: Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::InitInputDMA()
{
DEBUGMSG(ZONE_FUNCTION,(TEXT("+++InitInputDMA\n")));
if (!g_PhysDMABufferAddr.LowPart)
{
DEBUGMSG(TRUE, (TEXT("ERROR:HardwareContext::InitInputDMA: Invalid DMA buffer physical address.\r\n")));
return(FALSE);
}
//============================ Configure DMA Channel 1 ===========================
//------ On platforms with the revsion of the Samsung SC2440 CPU with the IIS SLAVE bug fix, this -----
// code can be used to configure DMA channel 1 for input.
//----- 1. Initialize the DMA channel for input mode and use the first input DMA buffer -----
g_pDMAregs->DISRC1 = (int)(S3C2440A_BASE_REG_PA_IISBUS+0x10);
g_pDMAregs->DISRCC1 = (SOURCE_PERIPHERAL_BUS | FIXED_SOURCE_ADDRESS); // Source is periperal bus, fixed addr
//----- 2. Initialize the DMA channel to receive data over the I2S bus -----
g_pDMAregs->DIDST1 = (int)(g_PhysDMABufferAddr.LowPart);
g_pDMAregs->DIDSTC1 &= ~(DESTINATION_PERIPHERAL_BUS | FIXED_DESTINATION_ADDRESS); // Destination is system bus, increment addr
//----- 3. Configure the DMA channel's transfer characteristics: handshake, sync PCLK, interrupt, -----
// single tx, single service, I2SSDI, I2S request, no auto-reload, half-word, tx count
g_pDMAregs->DCON1 = ( HANDSHAKE_MODE | GENERATE_INTERRUPT | I2SSDI_DMA1 | DMA_TRIGGERED_BY_HARDWARE
| TRANSFER_HALF_WORD | (AUDIO_DMA_PAGE_SIZE / 2)
);
return(TRUE);
}
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: StartInputDMA()
Description: Starts inputting the recorded sound data from the
audio codec chip via DMA.
Notes: ***** NOT IMPLEMENTED *****
The following routine is not implemented due to a
hardware bug in the revision of the Samsung SC2440
CPU this driver was developed on. See the header
at the top of this file for details.
Returns: Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::StartInputDMA()
{
//------ On platforms with the revsion of the Samsung SC2440 CPU with the IIS SLAVE bug fix, this -----
// code can be used to configure DMA channel 1 for input.
DEBUGMSG(ZONE_FUNCTION,(TEXT("+++StartInputDMA\n")));
if(!m_InputDMARunning)
{
//----- 1. Initialize our buffer counters -----
m_InputDMARunning=TRUE;
Codec_channel(); // Turn On Input channel
m_InBytes[IN_BUFFER_A]=m_InBytes[IN_BUFFER_B]=0;
//----- 2. Prime the output buffer with sound data -----
m_InputDMAStatus = (DMA_DONEA | DMA_DONEB) & ~DMA_BIU;
//----- 3. Configure the DMA channel for record -----
if(!InitInputDMA())
{
DEBUGMSG(ZONE_ERROR, (TEXT("HardwareContext::StartInputDMA() - Unable to initialize input DMA channel!\r\n")));
goto START_ERROR;
}
g_pIISregs->IISFCON |= (RECEIVE_FIFO_ACCESS_DMA | RECEIVE_FIFO_ENABLE);
g_pIISregs->IISCON |= RECEIVE_DMA_REQUEST_ENABLE;
g_pIISregs->IISMOD |= IIS_RECEIVE_MODE;
//----- 4. Make sure the audio isn't muted -----
AudioMute(DMA_CH_MIC, FALSE);
//----- 5. Start the input DMA -----
AUDIO_RESET_RECORD_POINTER();
SELECT_AUDIO_DMA_INPUT_BUFFER_A();
Codec_channel(); // Turn On Input channel
g_pDMAregs->DMASKTRIG1 = ENABLE_DMA_CHANNEL;
// wait for DMA to start.
while((g_pDMAregs->DSTAT1&0xfffff)==0);
// change the buffer pointer
SELECT_AUDIO_DMA_INPUT_BUFFER_B();
}
DEBUGMSG(ZONE_FUNCTION,(TEXT("---StartInputDMA\n")));
return(TRUE);
START_ERROR:
return(FALSE);
}
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: StopInputDMA()
Description: Stops any DMA activity on the input channel.
Notes: ***** NOT IMPLEMENTED *****
The following routine is not implemented due to a
hardware bug in the revision of the Samsung SC2440
CPU this driver was developed on. See the header
at the top of this file for details.
Returns: Boolean indicating success
-------------------------------------------------------------------*/
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