/* config.h - Wind River SBC405GP configuration header */

/*
modification history
--------------------
01b,17sep01,g_h  update to reflect the changes done in T2CP4
01a,22apr01,g_h  created from Walnut config.h version 01l.
*/

/*
This file contains the configuration parameters for the
Wind River SBC 405GP CPU evaluation board.
*/

#ifndef INCconfigh
#define INCconfigh

/* BSP version/revision identification, before configAll.h */
#define BSP_VER_1_1     0
#define BSP_VER_1_2     1
#define BSP_VERSION     "1.2"           /* A Tornado 2.0 BSP    */
#define BSP_REV         "/0"            /* 0 for first revision */

#include "configAll.h"

/*
 * If network support is included, either the native EMAC or the PCI Ethernet
 * should be chosen. Both are END style drivers.
 */
#define INCLUDE_NETWORK
#define INCLUDE_END
#define INCLUDE_EMAC_NETWORK            /* 405GP native EMAC network support */
#undef  INCLUDE_FEI_END                 /* Intel 82559 FEI network support   */

#if defined(INCLUDE_END)
  #if defined(INCLUDE_EMAC_NETWORK)
    #define BOOT_DEV_NAME	"emac"
  #elif defined(INCLUDE_FEI_END)
    #define BOOT_DEV_NAME	"fei"
  #else
    #define BOOT_DEV_NAME	"emac"
  #endif
#endif


#ifdef INCLUDE_EMAC_NETWORK
#define ETHERNET_ADR_SET	/* (used in bootConfig.c to enable 'N' command) */
#endif /* INCLUDE_EMAC_NETWORK */

/*
 * Define ONE of the following to specify the revision of the PPC405GP chip
 * you are using. Undefine all others. sysModel() will return
 * "Unknown processor" if the correct selection is not made.
 */

#define PPC405GP_REVD                  /* Needed only for PPC405GP Rev D     */
#undef  PPC405GP_REVE                  /* Needed only for PPC405GP Rev E     */

/* 			
 * If the FORCE_DEFAULT_BOOT_LINE is defined then the DEFAULT_BOOT_LINE
 * parameters are always used regardless of NVRAM values specified at
 * bootrom time. See target.nr for details. This is usually used to debug
 * downloaded images with out a bootrom present.
 */
#undef FORCE_DEFAULT_BOOT_LINE

#ifdef INCLUDE_WDB_COMM_VTMD
#define FORCE_DEFAULT_BOOT_LINE /* When using TMD this macro should be undefined */
#endif /* INCLUDE_WDB_COMM_VTMD */

#ifdef FORCE_DEFAULT_BOOT_LINE
#undef  INCLUDE_VWARE_LAUNCH
#else
#define INCLUDE_VWARE_LAUNCH

#endif /* FORCE_DEFAULT_BOOT_LINE */

/*
 * Default boot line
 */
#if defined(BOOT_DEV_NAME)
  #define DEFAULT_BOOT_LINE	BOOT_DEV_NAME \
				"(0,0)sbc405gp:vxWorks " \
				"e=24.42.124.92 " \
				"h=24.42.124.94 " \
				"g=0.0.0.0 "  \
				"u=vx pw=vx "     \
				"f=0x00 tn=sbc405gp"

  #ifdef INCLUDE_VWARE_LAUNCH
    #define VWARE_BOOT_LINE	BOOT_DEV_NAME \
				"(0,0)sbc405gp:vxworks " \
				"%s " \
				"%s " \
				"%s " \
				"u=anonymous pw=user " \
				"f=0x000 tn=sbc405gp" 
  #endif /* INCLUDE_VWARE_LAUNCH */
#endif /* BOOT_DEV_NAME */

/* NvRam defines */

#define NV_RAM_ADRS		ROM_BASE_ADRS
#define NV_RAM_SIZE		0x200
#undef  NV_BOOT_OFFSET
#define NV_BOOT_OFFSET	0
#define NV_ENET_OFFSET	0x1f0	/* Offset of Ethernet HW adrs from the boot offset */

/*
 * The constants ROM_TEXT_ADRS, ROM_SIZE, RAM_HIGH_ADRS, and RAM_LOW_ADRS
 * are defined in config.h and Makefile.
 * All definitions for these constants must be identical.
 *
 * Boot ROM address space.
 */

#define LOCAL_MEM_SIZE        0x04000000        /* 64 memory default          */
#define LOCAL_MEM_LOCAL_ADRS  0x00000000        /* fixed at zero              */

#define ROM_BASE_ADRS         0xffe00000		/* base address of ROM  */
#define ROM_TEXT_ADRS         (ROM_BASE_ADRS + NV_RAM_SIZE)	/* with PC & SP   */
#define ROM_WARM_ADRS         (ROM_TEXT_ADRS+0x0004)	/* warm reboot entry  */
#define ROM_SIZE              0x000ff000		/* 512KB                */
#define RAM_LOW_ADRS          0x00010000		/* RAM addr for vxWorks */
#define RAM_HIGH_ADRS         0x01C00000		/* RAM addr for bootrom */
#define USER_RESERVED_MEM     0x02000000		/* see sysMemTop()      */



/*
 * Cache options
 */

#define INCLUDE_CACHE_SUPPORT
/*  #undef INCLUDE_CACHE_ENABLE */

#define USER_D_CACHE_ENABLE
#define USER_I_CACHE_ENABLE
#undef  USER_D_CACHE_MODE
#define USER_D_CACHE_MODE       (CACHE_COPYBACK)


/*
 * 405 timers (PIT, FIT, WDT) can be driven from an external clock source,
 * or at the same frequency as the CPU.
 */

#undef TIMER_CLOCK_EXTERNAL

/*
 * The clock used to drive the UARTs on the 405GP can be derived from
 * one of two different sources.  The 11.0592 MHz external oscillator on SBC405GP
 * can be used, or the CPU clock can be used with an additional internal UART
 * divisor (see the CPC0_CR0 register).  If you do not want to use the external
 * UART clock oscillator, undef UART_CLOCK_EXTERNAL
 * NOTE: Revs B, C and D of the 405GP have an errata which prevents the
 * internal divisor to work at different rates. So if you want to use a 
 * different console BAUD rate, it is recommended that you use the external
 * clock.
 */

#define  UART_CLOCK_EXTERNAL      /* define to use external 11.0592 MHz clock */

/*
 * Auxilliary Timer rates
 */

#ifdef TIMER_CLOCK_EXTERNAL
   #define AUX_CLK_RATE_MIN     (EXT_TIMER_CLK_FREQ / (1 << 21) )
   #define AUX_CLK_RATE_MAX     (EXT_TIMER_CLK_FREQ / (1 << 9)  )
   #define AUX_CLK_RATE_DEFAULT (EXT_TIMER_CLK_FREQ / (1 << 17) )
#else
   #define AUX_CLK_RATE_MIN     (SYS_CLK_FREQ / (1 << 21) )
   #define AUX_CLK_RATE_MAX     (SYS_CLK_FREQ / (1 << 9)  )
   #define AUX_CLK_RATE_DEFAULT (SYS_CLK_FREQ / (1 << 17) )
#endif

/*
 * Watchdog Timer rates
 */

#define WDT_RATE_MIN      1     /* minimum watchdog timer rate */
#define WDT_RATE_MAX      5000  /* maximum watchdog timer rate */

/* Remove unused network drivers */

#undef  INCLUDE_EI
#undef  INCLUDE_EX
#undef  INCLUDE_ENP
#undef  INCLUDE_LN
#undef  INCLUDE_SM_NET
#undef  INCLUDE_SM_SEQ_ADDR


/* #define for software floating point support */

#undef INCLUDE_SW_FP

/* Serial port configuration */

#define  INCLUDE_SIO

/* PCI configuration */

#define INCLUDE_PCI

#ifdef  INCLUDE_PCI
#define INCLUDE_PCI_AUTOCONF
/* PCI Latency Timer value */
#define PCI_LAT_TIMER          255
#define INCLUDE_SHOW_ROUTINES   
#endif /* INCLUDE_PCI */


/*
 * WDB communication is via an Enhanced Network Driver
 */

#ifdef  INCLUDE_NETWORK
#define INCLUDE_END
#undef  WDB_COMM_TYPE
#define WDB_COMM_TYPE        WDB_COMM_END
#endif  /* INCLUDE_NETWORK */

#define VEC_BASE	(char *)0

/*
 * MMU support.
 */
#define  INCLUDE_MMU_BASIC 
#define  USER_D_MMU_ENABLE
#define  USER_I_MMU_ENABLE

/*
 * On the 405 CPU we cannot enable the MMU unless the caches are initialized
 * (unless ofcourse we mark the entire address space as un-cacheable). There
 * is no separate way of disabling the caches when the MMU is enabled, other
 * than on a page-by-page basis. Hence it is recommended that caches always
 * be used whenever the MMU is used.
 */
#ifdef INCLUDE_MMU_BASIC
    #ifndef INCLUDE_CACHE_SUPPORT
    #error "You need to include Cache support for MMU support."
    #endif
#endif

/* #define NVRAM_IN_FLASH */
#define INCLUDE_FLASH
 
/* Include the other configuration values */

#include "wrSbc405gp.h"        /* board header file          */
#include "ppc405GP.h"          /* chip header file           */

/* USB Stuff */
#define INCLUDE_USB
/*  #define INCLUDE_UHCI */
#define INCLUDE_USB_MOUSE
#define INCLUDE_USB_KEYBOARD
#define INCLUDE_USB_MS_BULKONLY
#define INCLUDE_USB_MS_CBI
#define INCLUDE_USB_PRINTER
#define INCLUDE_USB_SPEAKER
#define INCLUDE_SL811H
#define SL811H_IO_ADDR SL811H_MEMORY_START
#define SL811H_IO_ADDR_DATA ((SL811H_MEMORY_START) | 0x800000)
#define SL811H_INT_LVL INT_LVL_EXT_IRQ_0 /* PPC405GP UIC Interrupt 25 - External IRQ 0 */
#define SL811H_INT_VEC INT_VEC_EXT_IRQ_0 /* PPC405GP UIC Interrupt 25 - External IRQ 0 */

/* Extra modules */
#define INCLUDE_CPLUS_DEMANGLER
#define INCLUDE_DEBUG
#define INCLUDE_DOSFS
#define INCLUDE_HW_FP_SHOW
#define INCLUDE_LOADER
#define INCLUDE_MEM_SHOW
#define INCLUDE_PING
/*  #define INCLUDE_RBUFF */ /* For WindView */
#define INCLUDE_RPC
/*  #define INCLUDE_SEQ_TIMESTAMP */ /* For WindView */
#define INCLUDE_SHELL
#define INCLUDE_SPY
#define INCLUDE_STARTUP_SCRIPT
#define INCLUDE_SYM_TBL_INIT
#define INCLUDE_SYM_TBL_SYNC
#define INCLUDE_NET_SYM_TBL
/*  #define INCLUDE_STANDALONE_SYM_TBL */
#define INCLUDE_TASK_SHOW
#define INCLUDE_UNLOADER
#define INCLUDE_WDB_TSFS
#define INCLUDE_WDB_VIO_LIB
/* For WindView */
/*  #define INCLUDE_WINDVIEW */
/*  #define INCLUDE_WINDVIEW_CLASS */
/*  #define INCLUDE_WVUPLOAD_FILE */
/*  #define INCLUDE_WVUPLOAD_TSFSSOCK */

#endif  /* INCconfigh */
#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif