?? __projnav.log
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Project Navigator Auto-Make Log File-------------------------------------
Release 5.1i - xaw2jhd F.23Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
Project Navigator Auto-Make Log File-------------------------------------
Release 5.1i - xaw2jhd F.23Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
Project Navigator Auto-Make Log File-------------------------------------
Release 5.1i - xaw2jhd F.23Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
Project Navigator Auto-Make Log File-------------------------------------
Release 5.1i - xaw2jhd F.23Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
Project Navigator Auto-Make Log File-------------------------------------
Release 5.1i - xaw2jhd F.23Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
Project Navigator Auto-Make Log File-------------------------------------
Release 5.1i - xaw2jhd F.23Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
Project Navigator Auto-Make Log File-------------------------------------
Started process "View HDL Source".Release 5.1i - xaw2verilog F.23Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.Completed process "View HDL Source".
Started process "View Verilog Instantiation Template".Completed process "View Verilog Instantiation Template".JHDPARSE - VHDL/Verilog Parser.
ISE 5.1i Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
Scanning DCM1.v
No errors or warnings
JHDPARSE complete - 0 errors, 0 warnings.
Project Navigator Auto-Make Log File-------------------------------------
Started process "View HDL Source".Release 5.1i - xaw2verilog F.23Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.Completed process "View HDL Source".
Started process "View Verilog Instantiation Template".Completed process "View Verilog Instantiation Template".JHDPARSE - VHDL/Verilog Parser.
ISE 5.1i Copyright (c) 1995-2002 Xilinx, Inc. All rights reserved.
Scanning rocket_IO.v
No errors or warnings
JHDPARSE complete - 0 errors, 0 warnings.
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