/*----------------------------------------------------------------------------
*         ATMEL Microcontroller Software Support  -  ROUSSET  -
*----------------------------------------------------------------------------
* The software is delivered "AS IS" without warranty or condition of any
* kind, either express, implied or statutory. This includes without
* limitation any warranty or condition with respect to merchantability or
* fitness for any particular purpose, or against the infringements of
* intellectual property rights of others.
*----------------------------------------------------------------------------
* File Name           : Board.h
* Object              : AT91SAM7S Evaluation Board Features Definition File.
*
* Creation            : JPP   16/Jun/2004
* modified            : Embest z.j.zheng 2005.05.12
*					  : Leds Definition, Push Buttons Definition modified 
*				      : 8 segment digital Definition added
*----------------------------------------------------------------------------
*/
#ifndef Board_h
#define Board_h

#include "AT91SAM7S64.h"
#define __inline inline
#include "lib_AT91SAM7S64.h"

#define true	-1
#define false	0


/*-------------------------------*/
/* SAM7Board Memories Definition */
/*-------------------------------*/
// The AT91SAM7S64 embeds a 16-Kbyte SRAM bank, and 64 K-Byte Flash

#define  INT_SARM           0x00200000
#define  INT_SARM_REMAP	    0x00000000

#define  INT_FLASH          0x00000000
#define  INT_FLASH_REMAP    0x01000000

#define  FLASH_PAGE_NB	    512
#define  FLASH_PAGE_LOCK    32
#define  FLASH_PAGE_SIZE    128

/*-----------------*/
/* Leds Definition */
/*-----------------*/
/*                                 PIO   Flash    PA    PB   PIN */

#define LED1            (1<<1)	/* PA1 / PGMEN1 & PWM1 TIOB0  47 */
#define LED2            (1<<2)	/* PA2          & PWM2 SCK0   44 */
#define LED3            (1<<3)	/* PA3          & TWD  NPCS3  43 */
#define NB_LEB			3

#define LED_MASK        (LED1|LED2|LED3)

/*-------------------------*/
/* Push Buttons Definition */
/*-------------------------*/
/*                                 PIO    Flash    PA    PB    PIN */
#define SW1_MASK        (1<<17)	/* PA17 / PGMM1   & TD   PCK1    9*/
#define SW2_MASK        (1<<18)	/* PA18 / PGMM2   & RD   PCK2    10*/
#define SW3_MASK        (1<<19)	/* PA19 / PGMM3   & RK   FIQ     13*/
#define SW4_MASK        (1<<20)	/* PA20           & RF   IRQ0    16*/
#define SW_MASK         (SW1_MASK|SW2_MASK|SW3_MASK|SW4_MASK)


#define SW1 	(1<<17)	// PA17
#define SW2 	(1<<18)	// PA18
#define SW3 	(1<<19)	// PA19
#define SW4 	(1<<20)	// PA20

/*------------------*/
/* USART Definition */
/*------------------*/
/* SUB-D 9 points J3 DBGU*/
#define DBGU_RXD		AT91C_PA9_DRXD	  /* JP11 must be close */
#define DBGU_TXD		AT91C_PA10_DTXD	  /* JP12 must be close */
#define AT91C_DBGU_BAUD	   115200   // Baud rate

#define US_RXD_PIN		AT91C_PA5_RXD0    /* JP9 must be close */
#define US_TXD_PIN		AT91C_PA6_TXD0    /* JP7 must be close */
#define US_RTS_PIN		AT91C_PA7_RTS0    /* JP8 must be close */
#define US_CTS_PIN		AT91C_PA8_CTS0    /* JP6 must be close */

/*--------------*/
/* Master Clock */
/*--------------*/

#define EXT_OC          18432000   // Exetrnal ocilator MAINCK
#define MCK             47923200   // MCK (PLLRC div by 2)
#define MCKKHz          (MCK/1000) //
/*--------------------------------*/
/* 8 segment digital Definition   */
/*--------------------------------*/
#define SEGMENT_A		  0x01	
#define SEGMENT_B		  0x02
#define SEGMENT_C		  0x04
#define SEGMENT_D		  0x08
#define SEGMENT_P		  0x10
#define SEGMENT_E		  0x20
#define SEGMENT_F		  0x80
#define SEGMENT_G		  0x40

#define DIGIT_F	(SEGMENT_A | SEGMENT_G | SEGMENT_E | SEGMENT_F)
#define DIGIT_E	(SEGMENT_A | SEGMENT_G | SEGMENT_E | SEGMENT_F | SEGMENT_D)
#define DIGIT_D	(SEGMENT_B | SEGMENT_C | SEGMENT_D | SEGMENT_G | SEGMENT_E)
#define DIGIT_C	(SEGMENT_A | SEGMENT_D | SEGMENT_E | SEGMENT_F)
#define DIGIT_B	(SEGMENT_C | SEGMENT_D | SEGMENT_F | SEGMENT_E | SEGMENT_G)
#define DIGIT_A	(SEGMENT_A | SEGMENT_B | SEGMENT_C | SEGMENT_F | SEGMENT_E | SEGMENT_G)
#define DIGIT_9	(SEGMENT_A | SEGMENT_B | SEGMENT_C | SEGMENT_F | SEGMENT_G)
#define DIGIT_8	(SEGMENT_A | SEGMENT_B | SEGMENT_C | SEGMENT_D | SEGMENT_F | SEGMENT_E | SEGMENT_G)
#define DIGIT_7	(SEGMENT_A | SEGMENT_B | SEGMENT_C)
#define DIGIT_6	(SEGMENT_A | SEGMENT_C | SEGMENT_D | SEGMENT_F | SEGMENT_E | SEGMENT_G)
#define DIGIT_5	(SEGMENT_A | SEGMENT_C | SEGMENT_D | SEGMENT_F | SEGMENT_G)
#define DIGIT_4	(SEGMENT_B | SEGMENT_C | SEGMENT_F | SEGMENT_G)
#define DIGIT_3	(SEGMENT_A | SEGMENT_B | SEGMENT_C | SEGMENT_D | SEGMENT_G)
#define DIGIT_2	(SEGMENT_A | SEGMENT_B | SEGMENT_D | SEGMENT_E | SEGMENT_G)
#define DIGIT_1	(SEGMENT_B | SEGMENT_C)
#define DIGIT_0	(SEGMENT_A | SEGMENT_B | SEGMENT_C | SEGMENT_D | SEGMENT_E | SEGMENT_F)


/*-----------------*/
/* LCds Definition */
/*-----------------*/
#define RS             (1<<21)	/* PA21  */                                 
#define RW             (1<<22)	/* PA22  */
#define ELCM           (1<<23)	/* PA23  */
#define LCM_CONTROL    (RS | RW | ELCM)


#define LCM_DB0        (1<<24)  /* PA24  */
#define LCM_DB1        (1<<25)  /* PA25  */
#define LCM_DB2        (1<<26)  /* PA26  */
#define LCM_DB3        (1<<27)  /* PA27  */
#define LCM_DB4        (1<<28)  /* PA28  */
#define LCM_DB5        (1<<29)  /* PA29  */
#define LCM_DB6        (1<<30)  /* PA30  */
#define LCM_DB7        (1<<31)  /* PA31  */

#define LCM_PORT      ( LCM_DB0 | LCM_DB1 | LCM_DB2 | LCM_DB3 |  LCM_DB4 | LCM_DB5 | LCM_DB6 | LCM_DB7)

#define Busy	0x80


#endif /* Board_h */