?? dsp_init.h
字號:
.title "Include file with I/O register declarations"
* file: DSP_INIT.h
* funtion: register address declaraction
* AUTHER: MR. YAOZHENDONG, OCT,27,1998 *
*==================================================================
* .mmregs ;Include reserved words
* .bss dmem,10 ;Undefined Variables space
* .def ini_d,start,codtx ;Directive for symbl address
;generation in the current module
;-optional
*ini_d: .usect "new",10 ;Example of undefined varibal space
;with the segment's name as "new"
* .data ;Example of including dummy constants
;-optional
* .word 055aah
* .word 0aa55h
* On-chip register equates
* CLKOUT
CLK1 .set 0ffe8h
* Interrupt control
ICR .set 0ffech
* SYNC port
SDTR .set 0fff0h
SSPCR .set 0fff1h
* UART
ADTR .set 0fff4h
ASPCR .set 0fff5h
IOSR .set 0fff6h
BRD .set 0fff7h
* TIMER
TCR .set 0fff8h
PRD .set 0fff9h
TIM .set 0fffah
* Wait states
WSGR .set 0fffch
* Variables
RXBUF .set 0300h
SIZE .set 0020h
DEL .set 0010h
*
* Saram mode
PMST .set 0ffe4h
*
* interrupt-flag register
IFR .set 00006h
*
* Global-memory allocation register
GREG .set 00005h
*
* interrupt-mask register
IMR .set 00004h
*
* clkout1 on or off
CLK .set 0ffe8h
*
* interrupt-control register
icr .set 0ffech
*
*
;****************************************
; Expand stake : pop
stkpop .macro
mar *,ar7
lar ar7,#370h
rpt #6h
popd *+
.endm
*
; Expand stake : push
stkpush .macro
mar *,ar7
lar ar7,#370h+7
rpt #6h
pshd *-
.endm
;****************************************
*=====================================================================
* mdiv computting (A * C / B) import: A:302h B:303h C:304h
* output: quotient:302h remainder:303h
*=====================================================================
mdiv .macro
ldp #6h ; point to B1 300h
lt 02h ; SARAM[302h]-->T reg
mpyu 04h ; [302h]*[304h]-->P reg
clrc SXM ;suppresses sign-extension
lacl #0h ; clear ACC
spm 00
sph 02h ; [302h]=P[31..16]
spl 04h ; [304h]=P[15..0]
mpya * ; ACC = P
sub 03h ; [302h]*[304h](ividend) > [303h](divisor) ?
bcnd div?,C ; yes, jump div?
clrc SXM ;suppresses sign-extension
lacl #00h ; no, quotient = 0 --> accl
add 04h,16 ; and remainder = P[15..0] --> acch
b comple?
div?:
clrc SXM ;suppresses sign-extension
lacl 04h ; ACCL=PL
add 02h,16 ; ACCH=PH
rpt #15 ; using subc to complete division
subc 03h
comple?:
sacl 02h ; accl=quotient
sach 03h ; acch=remainder
.endm
*=================================================
*
*=========================================================================
* areaswp is a macro funtion that driving antenna sweeping in the fan-area
* import parameter:the first primary angle:1025h,the second primary angle:1026h
* velocity:1029h, gain:102ah, drive direction;102bh,
* the last time drive direction:102ch, the current angle:102dh
* the deadband voltage: 102eh
* variables: the fist slave angle:1027h, the second slave angle:1028h
* output parameter: error voltage:ACCL: [15..9] <-- S [8..0] <-- error
* the current direction:102ch
*============================================================================
*
areaswp .macro
lar ar1,#1027h
lar ar0,#1025h ; get the first primary angle
mar *,ar0 ; ar0 <- #1025h, * <- ar0
clrc SXM ;suppresses sign-extension
lacl *+ ; accl <-- 1026h, ar0 <-- #1026h
sub *+ ; sub the second prime angle, ar0 <- #1027h
sacl * ; check the position for 1st and 2nd
bit *-,4 ; 15-4=11bit --> TC, ar0 <-- #1026h
bcnd noexch?,TC
* ; exchage position
clrc SXM ;suppresses sign-extension
lacl *-,ar1 ; 1026h --> accl, ar0 <--#1025h, *<-ar1
sacl *+,ar0 ; accl --> 1027h, * <-- ar0
lacl *+ ; 1025h --> accl, ar0<-#1026h
sacl *-,ar1 ; accl --> 1026h, ar0 <-- #1025h, *=ar1
lacl *,ar0 ; *=ar0
sacl * ; the first(1025h) and the second(1026h)
; prime angle exchage positions complete
*
noexch?:lar ar0,#1025h ; don't exchange position
lar ar1,#102ah ; ar1=#102ah (point to gain)
clrc SXM ;suppresses sign-extension
lacl *+,ar1 ; silta1p:1025h --> accl, ar0=#1026h , *=ar1
add *,ar0 ; * <-- ar0 silta1s=silta1p+gain
mar *+ ; ar0=#1027h
and #0fffh ; clear high bits
sacl *- ; silta1s(the first slave angle)--->1027h
; ar0=#1026h
*
clrc SXM ;suppresses sign-extension
lacl *+,ar1 ; ar0=#1027h, * <-- ar1, accl<--1026h(silta2p)
sub *,ar0 ; silta2s=silta2p-gain, * <--ar0
and #0fffh ; clear msb bits
mar *+ ; ar0=#1028h
sacl * ; silta2s(the second slave angle)--->1028h
*
lar ar0,#1025h ; ar0=#1025h, silta1p
lar ar1,#102dh ; ar1=#102dh, current angle(siltac)
clrc SXM ;suppresses sign-extension
lacl *,ar1 ; accl=silta1p, * <-- ar1
sub *,ar0 ; silta1p-siltac
lar ar0,#1030h ; tmp
sacl * ; --> tmp
bit *,4,ar1 ; D11 --> TC
bcnd right0?,NTC ; jump to right0(siltac at silta1p right side)
lacl *,ar0 ; siltac-->accl
lar ar0,#1027h ; silta1s
sub * ; siltac-silta1s
lar ar0,#1030h ; tmp
sacl *
bit *,4,ar1 ; d11 --> TC
bcnd right1?,NTC ; goto right1(siltac at the right of silta1s)
*
shot1?: lar ar0,#1025h ; siltac belong to the area(silta1p,silta1s)
shot2?:
clrc SXM ;suppresses sign-extension
lacl *,ar0 ; siltac --> accl, * <- ar0(#silta1p)
add *,16 ; silta1p --> acch
lar ar0,#1023h
splk #0,* ; near buffer area is setting to zero
call delta ; computting the error angle(siltac-silt1p)
*
lar ar0,#1024h
mar *,ar0
clrc SXM ;suppresses sign-extension
lacl * ; error angle --> accl
and #01ffh ; abs(error)
lar ar0,#102ah
add *,16 ; gain --> acch
call gain ; control gain adjuge
*
shot3?: and #1ffh ; abs(error voltage)
lar ar0,#102ch ; the org dir
mar *,ar0
bit *,15 ; D0 --> TC
bcnd posit?,NTC ; =0, positive
or #0fe00h ; =1, negative
posit?: lar ar0,#1029h ; now, accl=error voltage. lead ar0 to speed
add *,16 ; spped --> acch
lar ar0,#300h
sach * ; speed --> 300h
call speed ; control speed correct
*
and #0ffffh ; clear acch
lar ar0,#102eh
mar *,ar0
add *,16 ; deadband voltage --> acch
lar ar0,#300h
sach * ; deadband voltage --> 300h
call plus ; plus the deadband voltage
*
ldp #0
sacl 60h ; Vs-->B2:60h
*
clrc SXM ;suppresses sign-extension
lacl 60h ; Vs --> accl, acch=0
ldp #20h ; dp --> 1000h
add 2bh,16 ; 102bh-->acch [D]
splk #01ffh,24h ; #1ff --> 1024h (error angle with near band)
call voltpro ; generating the last error voltage
; err volt --> accl
*
call errpro ; convert the error voltage data format
; to D/A tlc5617 format. result: accl
b quitend?
*----------------------------------------
right0?:
lar ar0,#1026h ; point to silta2p
mar *,ar0
clrc SXM ;suppresses sign-extension
lacl *- ; silta2p --> accl, ar0 point to silta1p(1025h)
sub * ; computting (silta2p-silta1p)
lar ar0,#1023h
sacl * ; --> 1023h
bit *,4 ; D11 --> TC
bcnd nonot?,NTC
cmpl
nonot?: and #07ffh ; accl=abs(deltasilta)
sfr ; deltasilta/2
lar ar0,#1025h ; point to silta1p
add * ; silta0=silta1p + (silta2p-silta1p)/2
and #0fffh
add #800h ; siltan=silta0+180degree
and #0fffh
*
lar ar0,#102dh ; siltac
sub * ; siltan-siltac
lar ar0,#1023h
sacl *
bit *,4 ; D11 --> TC
lar ar0,#102ch ; point to direction
lar ar1,#102dh ; ar0 --> siltac
bcnd clkdir?,TC
splk #1h,* ; clock back roting direction
lar ar0,#1026h ; ar0 --> silta2p
mar *,ar1
b shot2?
clkdir?:
splk #0,* ; depand on clock rotting direction
* lar ar0,#1025h ; ar0 --> silta1p
mar *,ar1
b shot1?
*==========================
right1?:ldp #20h ; point to 1000h
lar ar0,#1028h ; ar0 --> silta2s
mar *,ar0
clrc SXM ;suppresses sign-extension
lacl *
lar ar0,2dh ; ar0 --> siltac 102dh
sub * ; silta2s-siltac
lar ar0,#1023h
sacl *
bit *,4 ; D11 --> TC
bcnd left2?,NTC
lar ar0,#1026h ; ar0 --> silta2p
clrc SXM ;suppresses sign-extension
lacl *
lar ar0,#102dh ; ar0 --> siltac
sub * ; silta2p-siltac
lar ar0,#1023h
sacl *
bit *,4 ; D11-->TC
bcnd right0?,TC
lar ar1,#102dh ; ar0 --> siltac
lar ar0,#1026h ; ar0 --> silta2p
mar *,ar1
b shot2?
left2?: lacc #1ffh ; siltac is in the area (silta1s,silta2s)
b shot3?
*==========================
quitend?:
.endm
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