?? buxx_adsc.c
字號(hào):
/* ************************************************************************ */
/* */
/* ROHM BU15xx demo firmware on MD2306 */
/* Client : ROHM Co., Ltd.丂丂丂丂丂丂 */
/* End User : */
/* */
/* Processor: ARM-7TDMI(THUMB Mode) */
/* Dev.Env. : ARM-SDTv2.51 */
/* */
/* API:BU15xx control Routines */
/* */
/* file : BUxx_aDSC.c */
/* Auther : J.SATO(NTC)丂 */
/* Date : 2004/Jul./1 */
/* */
/* Copyright (c) 2002-04 Naritagiken Co., Ltd. All rights reserved. */
/* ************************************************************************ */
/* ************************************************** */
/* INCLUDE FILES */
/* ************************************************** */
#include "BUxx_aDSC.h"
#include "BUxx_demoset.h"
#include "LPC2294.h"
/* ************************************************** */
/* TYPEDEF */
/* ************************************************** */
#define BU1554_MIN(x,y) ((x)>(y) ? (y) : (x))
/* ************************************************** */
/* LOCAL DEFINES */
/* ************************************************** */
/* ************************************************** */
/* GLOBAL VARIABLE */
/* ************************************************** */
volatile int gl_bank_chk;
volatile int gl_je_end_chk;
volatile int gl_jd_end_chk;
volatile int gl_cam_end_chk;
volatile int gl_check_int;
volatile int gl_dsc_status;
#ifdef HOSTJD_TEST
unsigned char gl_intcheck_sequence[30];
unsigned char gl_intcheck_index=0;
unsigned char gl_intdisp_sequence[30];
unsigned char gl_intdisp_index=0;
unsigned char gl_intmask_begin=0;
unsigned char gl_intmask_end=0;
unsigned char gl_jpgintmask_begin=0;
unsigned char gl_jpgintmask_end=0;
#endif
//
// Structs and Types for JPEG header
//
typedef struct
{ // Huffman table
UINT8 cod[16];
UINT8 val[1];
}
HTABLE;
typedef struct
{ // Q table
UINT8 table[8][8];
}
QTABLE;
typedef struct
{ // header information
UINT16 X;
UINT16 Y;
UINT16 interval;
UINT8 type; // 0:444, 1:422, 2:411, 3:420, 4:gray
HTABLE *h_y_dc;
HTABLE *h_y_ac;
HTABLE *h_c_dc;
HTABLE *h_c_ac;
QTABLE *q_y;
QTABLE *q_c;
UINT8 *code;
UINT32 code_size;
}
JPEG_INFO;
UINT32 ctable[] = { 0, 8035, 7568, 6811, 5793, 4551, 3135, 1598 };
UINT8 zigzag[] = { 0, 1, 8, 16, 9, 2, 3, 10,
17, 24, 32, 25, 18, 11, 4, 5,
12, 19, 26, 33, 40, 48, 41, 34,
27, 20, 13, 6, 7, 14, 21, 28,
35, 42, 49, 56, 57, 50, 43, 36,
29, 22, 15, 23, 30, 37, 44, 51,
58, 59, 52, 45, 38, 31, 39, 46,
53, 60, 61, 54, 47, 55, 62, 63
};
typedef struct
{
UINT8 regread[2];
}
JPEG_data;
typedef struct
{
UINT8 Lf[2];
UINT8 P;
UINT8 Y[2];
UINT8 X[2];
UINT8 Nf;
UINT8 CHVT[3][3]; //CHVT[?][0]:C,CHVT[?][1]:HV,CHVT[?][2]:T
}
SOF_data;
typedef struct
{
UINT8 Lh[2];
UINT8 TcTh;
UINT8 Ln[16];
}
DHT_data;
typedef struct
{
UINT8 Lq[2];
UINT8 PqTq;
UINT8 Qn[64];
}
DQT_data;
typedef struct
{
UINT8 Lr[2];
UINT8 Ri[2];
}
DRI_data;
typedef struct
{
UINT8 Ls[2];
UINT8 Ns;
UINT8 CTT[4][2]; //CTT[?][0]:Cs,CTT[?][1]:TdTa
}
SOS_data;
/* ************************************************** */
/* CONST */
/* ************************************************** */
/* ************************************************** */
/* GLOBAL FUNCTIONS */
/* ************************************************** */
/* ************************************************** */
/* LOCAL FUNCTIONS */
/* ************************************************** */
static int jpeg_encode(UINT16 * start_add, UINT32 * const jpeg_size,
const int entype, const UINT16 je_q,
const UINT16 hflip);
static int jpeg_decode(UINT8 * start_add, UINT32 * const jpeg_size,
const CAMSET * const cam);
static int jpeg_HostDec(UINT8 * start_add, UINT32 * const jpeg_size, UINT16* p_u16Rgb_addr,
const CAMSET * const cam);
static int analyze_header(UINT8 * const jpeg, UINT32 * const jpeg_size,
JPEG_INFO * const jpeg_info);
static void set_jpeg_setting(const UINT16 X, const UINT16 Y,
const UINT16 interval, const UINT8 type);
static void set_huf_table(const HTABLE * const y_dc,
const HTABLE * const y_ac,
const HTABLE * const c_dc,
const HTABLE * const c_ac);
static void set_q_table(const QTABLE * const q_y,
const QTABLE * const q_c);
static void set_each_q_table(const QTABLE * const qtbl);
static void set_code(UINT8 * code, const UINT32 start, const UINT32 end);
static void read_code(UINT16 ** start_add, int store_num);
static void CheckJpegInt(void);
static int JpegIntDisp(UINT16* u16Rgb_addr, UINT32* p_u32CurRgbSize, UINT32 u32TotalRgbSize);
//-----------------------------------------------------------------------------
// bu15xx initialize
//-----------------------------------------------------------------------------
int aDSC_bu15xx_OPEN(void)
{
int i;
UINT16 temp;
int ret_code = 0;
int err_code = 0;
gl_check_int = 0;
gl_dsc_status = 0;
//---- HW Mode register initialize----
hwmode_write(sSUSPEND);
hostcnt_write(sDIRECT_ACS | sDIRECT_ENABLE | HOST_TYPE);
mode_change(sREADY);
wait(1);
data_write(0xD0, 0x0004); // SCLK ON
data_write(0xF8, 0x0000); // RESET clear
data_write(0xF8, 0x0010); // Initialize Register Enable
data_write(0xF8, 0x0011); // Initialize Sequence Start
while (reg_read(REG) & 0x0002);
data_write(0xD0, 0x0000); // SCLK OFF
data_write(0xF8, 0x0000); // Initialize Register Disable
data_write(0xF8, 0x1000); // Compensation Enable
data_write(0xD0, 0x0004); // SCLK ON
data_write(0xD9, 0x0000); // BANK 0 select
data_write(0xFA, 0x0300); // BANK 0 Enable
data_write(0xD9, 0x0100); // BANK 1 select
data_write(0xFA, 0x0300); // BANK 1 Enable
data_write(0xD9, 0x0200); // BANK 2 select
data_write(0xFA, 0x0300); // BANK 2 Enable
data_write(0xD9, 0x0300); // BANK 3 select
data_write(0xFA, 0x0300); // BANK 3 Enable
data_write(0xD9, 0x0400); // BANK 4 select
data_write(0xFA, 0x0300); // BANK 4 Enable
data_write(0xD9, 0x0500); // BANK 5 select
data_write(0xFA, 0x0300); // BANK 5 Enable
data_write(0xD9, 0x0600); // BANK 6 select
data_write(0xFA, 0x0300); // BANK 6 Enable
data_write(0xD9, 0x0700); // BANK 7 select
data_write(0xFA, 0x0300); // BANK 7 Enable
data_write(0xD9, 0x0800); // BANK 8 select
data_write(0xFA, 0x0300); // BANK 8 Enable
data_write(0xD9, 0x0900); // BANK 9 select
data_write(0xFA, 0x0300); // BANK 9 Enable
data_write(0xD9, 0x0a00); // BANK10 select
data_write(0xFA, 0x0300); // BANK10 Enable
data_write(0xD9, 0x0b00); // BANK11 select
data_write(0xFA, 0x0300); // BANK11 Enable
//---- Clock Mode register initialize----
ret_code = clk_div1_set(SCLK_DIV); // SCLK = XIN / SCLK_DIV
if (ret_code)
err_code = ret_code | 0x01000;
ret_code = clk_div2_set(LCDFR_DIV, LCDFR_DELAY); // LCDFR = (SCLK / 4096) / LCDFR_DIV
if (ret_code)
err_code = ret_code | 0x01100;
ret_code = clk_div3_set(CAMCKO_DIV); // CAMCKO = XIN / CAMCKO_DIV
if (ret_code)
err_code = ret_code | 0x01200;
clk_cnt_set(VD_EN | VDEDG_SEL | LCD_BASE_TIMING | sLCDFR_ENABLE | sSCK_ENABLE | sCMCK_ENABLE); //LCDFR,SCLK,CAMCKO Enable
//---- Interrupt register initialize----
data_write(INDEX, 0x0000); //Interrupt status clear
data_write(INTMSK, 0xffff); //all mask cleared
data_write(INTCNT, INT_POL | INT_SEL); //Interrupt control
//---- LED PWM Control initialize ----
data_write(PWMCNT1, LEDCNT_POL | LEDCNT_EN);
//---- GIO register initialize----
data_write(GIOCNT, 0x7f7b); //all input
data_write(EXGIOCNT, 0xffff); //all input
//---- GIO2 high:cam i/f ON ----
// data_write(GIOOUT, 0x0004);
data_write(GIOOUT, 0x0000);
wait(5);
bit_write(0x0120, 0x0003,0x0000); // GPIO2 cortarl
//---- Memory register initialize----
mem_point_set(0, 0); //cam image storage position set
data_write(MEMCNT, 0x0000);
mem_acs_read_st(MEMACS_YUV);
for (i = 0; i < 5; i++)
{
temp = reg_read(REG);
}
//---- CAM register initialize ----
cam_if_set(sCAMRST_OFF | VSPOL | HSPOL | CKPOL | RGBorYUV | RGBORD | YUVORD); //cam I/F setup
ret_code = cam_tim_set(CXS, CYS); //A cam I/F frame start pixel position is set up
if (ret_code)
err_code = ret_code | 0x01300;
data_write(CAMFLT, sDISABLE); //fliter function:DISABLE
ret_code = cam_size_set(CAM_HSIZE, CAM_VSIZE); //Camera image size is set up
if (ret_code)
err_code = ret_code | 0x01400;
data_write(CAMYD, 0x0000); //A brightness element is expanded
cam_lowpathfilter_set();
mode_change(sREADY);
wait(1);
if (err_code)
DEBUG_WRITE((0, 0, "%x", err_code));
return (err_code);
}
//-----------------------------------------------------------------------------
// BU15xx CLOSE dispose (SUSPEND mode)
//-----------------------------------------------------------------------------
void aDSC_bu15xx_CLOSE(void)
{
aDSC_Quit_Preview();
if (bit_read(LCDCNT, bLCD_SEL) == sMAIN_ACS)
{
column_page_set(0, M_LCD_WSIZE - 1, 0, M_LCD_HSIZE - 1);
}
else
{
column_page_set(0, S_LCD_WSIZE - 1, 0, S_LCD_HSIZE - 1);
}
mode_change(sSUSPEND);
}
//-----------------------------------------------------------------------------
// Start Preview dispose
//-----------------------------------------------------------------------------
int aDSC_Start_Preview(const UINT16 st_x, const UINT16 st_y,
const UINT16 xsize, const UINT16 ysize,
const CAMSET * const cam)
{
int err_code = 0;
int ret_code = 0;
aDSC_Quit_Preview();
ret_code = lcd_trans_set(st_x, st_y, xsize, ysize);
if (ret_code)
err_code = ret_code | 0x1500;
ret_code = cam_capture_set(cam);
if (ret_code)
err_code = ret_code | 0x1600;
mode_change(sNVIEWER); //VIEWER MODE
if (err_code)
DEBUG_WRITE((0, 0, "%x", err_code));
return (err_code);
}
//-----------------------------------------------------------------------------
// Quit Preview dispose
//-----------------------------------------------------------------------------
UINT16 aDSC_Quit_Preview(void)
{
UINT16 reg_data;
reg_data = hwmode_read();
if (reg_data == sNVIEWER)
{
wait_int0(bLCDED_MSK);
/* William delete 20050524
if (bit_read(LCDCNT, bLCD_SEL) == sMAIN_ACS)
{
column_page_set(0, M_LCD_WSIZE - 1, 0, M_LCD_HSIZE - 1);
}
else
{
column_page_set(0, S_LCD_WSIZE - 1, 0, S_LCD_HSIZE - 1);
}
*/
}
else if (reg_data != sREADY)
{
mode_change(sREADY);
}
return (reg_data);
}
/*
int aDSC_ExOverlay_Preview(const UINT16 *p_Ovldata,const tExOvl* p_ExOvl )
{
UINT16 cnt,u16Temp;
UINT8 u8OvlNum;
data_write(OVL_CNT,0x0012);
data_write(OVL_TRANS,0xffff);
data_write(OVL_TRMSK,0x0000);
data_write(OVLSIZE,0x2020); //32*32
data_write(OVL_FRMST1,0x0000);
data_write(OVL_ST1,0x0000);
data_write(OVL_ED1,0x1f1f);
data_write(MEM_ADR_OVL_ST,0x0000);
data_write(MEM_ADR_OVL_ED,0x1f1f);
bit_write(MEMCNT, bINCMTH | bADRINC, HIGH); //rectangle increment丄auto increment on
memcnt_data = reg_read(INDEX);
reg_write(INDEX, MEMACS_OVL);
for(i=0;i<32*32;i++)
{
reg_write(REG, char_dat[i]);
}
bit_write(MEMCNT, bINCMTH | bADRINC, LOW); //rectangle increment丄auto increment off
// data_write(OVL_CNT,0x0000);
reg_write(INDEX, OVL_CNT);
if ((reg_read(REG) & 0x0002) == 0)
{
wait_time = 0;
x_step = 1;
y_step = 1;
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