/* linux/drivers/i2c/busses/i2c-s3c2410.c * * Copyright (C) 2004,2005 Simtec Electronics *	Ben Dooks <ben@simtec.co.uk> * * S3C2410 I2C Controller * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA*/#include <linux/config.h>#include <linux/kernel.h>#include <linux/module.h>#include <linux/i2c.h>#include <linux/i2c-id.h>#include <linux/init.h>#include <linux/time.h>#include <linux/interrupt.h>#include <linux/sched.h>#include <linux/delay.h>#include <linux/errno.h>#include <linux/err.h>#include <linux/platform_device.h>#include <asm/hardware.h>#include <asm/irq.h>#include <asm/io.h>#include <asm/hardware/clock.h>#include <asm/arch/regs-gpio.h>#include <asm/arch/regs-iic.h>#include <asm/arch/iic.h>/* i2c controller state */enum s3c24xx_i2c_state {	STATE_IDLE,	STATE_START,	STATE_READ,	STATE_WRITE,	STATE_STOP};struct s3c24xx_i2c {	spinlock_t		lock;	wait_queue_head_t	wait;	struct i2c_msg		*msg;	unsigned int		msg_num;	unsigned int		msg_idx;	unsigned int		msg_ptr;	enum s3c24xx_i2c_state	state;	void __iomem		*regs;	struct clk		*clk;	struct device		*dev;	struct resource		*irq;	struct resource		*ioarea;	struct i2c_adapter	adap;};/* default platform data to use if not supplied in the platform_device*/static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {	.flags		= 0,	.slave_addr	= 0x10,	.bus_freq	= 100*1000,	.max_freq	= 400*1000,	.sda_delay	= S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,};/* s3c24xx_i2c_is2440() * * return true is this is an s3c2440*/static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c){	struct platform_device *pdev = to_platform_device(i2c->dev);	return !strcmp(pdev->name, "s3c2440-i2c");}/* s3c24xx_i2c_get_platformdata * * get the platform data associated with the given device, or return * the default if there is none*/static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev){	if (dev->platform_data != NULL)		return (struct s3c2410_platform_i2c *)dev->platform_data;	return &s3c24xx_i2c_default_platform;}/* s3c24xx_i2c_master_complete * * complete the message and wake up the caller, using the given return code, * or zero to mean ok.*/static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret){	dev_dbg(i2c->dev, "master_complete %d\n", ret);	i2c->msg_ptr = 0;	i2c->msg = NULL;	i2c->msg_idx ++;	i2c->msg_num = 0;	if (ret)		i2c->msg_idx = ret;	wake_up(&i2c->wait);}static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c){	unsigned long tmp;		tmp = readl(i2c->regs + S3C2410_IICCON);	writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);}static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c){	unsigned long tmp;		tmp = readl(i2c->regs + S3C2410_IICCON);	writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);}/* irq enable/disable functions */static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c){	unsigned long tmp;		tmp = readl(i2c->regs + S3C2410_IICCON);	writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);}static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c){	unsigned long tmp;		tmp = readl(i2c->regs + S3C2410_IICCON);	writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);}/* s3c24xx_i2c_message_start * * put the start of a message onto the bus */static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, 				      struct i2c_msg *msg){	unsigned int addr = (msg->addr & 0x7f) << 1;	unsigned long stat;	unsigned long iiccon;	stat = 0;	stat |=  S3C2410_IICSTAT_TXRXEN;	if (msg->flags & I2C_M_RD) {		stat |= S3C2410_IICSTAT_MASTER_RX;		addr |= 1;	} else		stat |= S3C2410_IICSTAT_MASTER_TX;	if (msg->flags & I2C_M_REV_DIR_ADDR)		addr ^= 1;	// todo - check for wether ack wanted or not	s3c24xx_i2c_enable_ack(i2c);	iiccon = readl(i2c->regs + S3C2410_IICCON);	writel(stat, i2c->regs + S3C2410_IICSTAT);		dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);	writeb(addr, i2c->regs + S3C2410_IICDS);		// delay a bit and reset iiccon before setting start (per samsung)	udelay(1);	dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);	writel(iiccon, i2c->regs + S3C2410_IICCON);		stat |=  S3C2410_IICSTAT_START;	writel(stat, i2c->regs + S3C2410_IICSTAT);}static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret){	unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);	dev_dbg(i2c->dev, "STOP\n");	/* stop the transfer */	iicstat &= ~ S3C2410_IICSTAT_START;	writel(iicstat, i2c->regs + S3C2410_IICSTAT);		i2c->state = STATE_STOP;		s3c24xx_i2c_master_complete(i2c, ret);	s3c24xx_i2c_disable_irq(i2c);}/* helper functions to determine the current state in the set of * messages we are sending *//* is_lastmsg() * * returns TRUE if the current message is the last in the set */static inline int is_lastmsg(struct s3c24xx_i2c *i2c){	return i2c->msg_idx >= (i2c->msg_num - 1);}/* is_msglast * * returns TRUE if we this is the last byte in the current message*/static inline int is_msglast(struct s3c24xx_i2c *i2c){	return i2c->msg_ptr == i2c->msg->len-1;}/* is_msgend * * returns TRUE if we reached the end of the current message*/static inline int is_msgend(struct s3c24xx_i2c *i2c){	return i2c->msg_ptr >= i2c->msg->len;}/* i2s_s3c_irq_nextbyte * * process an interrupt and work out what to do */static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat){	unsigned long tmp;	unsigned char byte;	int ret = 0;	switch (i2c->state) {	case STATE_IDLE:		dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __FUNCTION__);		goto out;		break;	case STATE_STOP:		dev_err(i2c->dev, "%s: called in STATE_STOP\n", __FUNCTION__);		s3c24xx_i2c_disable_irq(i2c);				goto out_ack;	case STATE_START:		/* last thing we did was send a start condition on the		 * bus, or started a new i2c message		 */				if (iicstat  & S3C2410_IICSTAT_LASTBIT &&		    !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {			/* ack was not received... */			dev_dbg(i2c->dev, "ack was not received\n");			s3c24xx_i2c_stop(i2c, -EREMOTEIO);			goto out_ack;		}		if (i2c->msg->flags & I2C_M_RD)			i2c->state = STATE_READ;		else			i2c->state = STATE_WRITE;		/* terminate the transfer if there is nothing to do		 * (used by the i2c probe to find devices */		if (is_lastmsg(i2c) && i2c->msg->len == 0) {			s3c24xx_i2c_stop(i2c, 0);			goto out_ack;		}		if (i2c->state == STATE_READ)			goto prepare_read;		/* fall through to the write state, as we will need to 		 * send a byte as well */	case STATE_WRITE:		/* we are writing data to the device... check for the		 * end of the message, and if so, work out what to do		 */	retry_write:		if (!is_msgend(i2c)) {			byte = i2c->msg->buf[i2c->msg_ptr++];			writeb(byte, i2c->regs + S3C2410_IICDS);					} else if (!is_lastmsg(i2c)) {			/* we need to go to the next i2c message */			dev_dbg(i2c->dev, "WRITE: Next Message\n");			i2c->msg_ptr = 0;			i2c->msg_idx ++;			i2c->msg++;						/* check to see if we need to do another message */			if (i2c->msg->flags & I2C_M_NOSTART) {				if (i2c->msg->flags & I2C_M_RD) {					/* cannot do this, the controller					 * forces us to send a new START					 * when we change direction */					s3c24xx_i2c_stop(i2c, -EINVAL);				}				goto retry_write;			} else {							/* send the new start */				s3c24xx_i2c_message_start(i2c, i2c->msg);				i2c->state = STATE_START;			}		} else {			/* send stop */			s3c24xx_i2c_stop(i2c, 0);		}		break;	case STATE_READ:		/* we have a byte of data in the data register, do 		 * something with it, and then work out wether we are		 * going to do any more read/write		 */		if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) &&		    !(is_msglast(i2c) && is_lastmsg(i2c))) {			if (iicstat & S3C2410_IICSTAT_LASTBIT) {				dev_dbg(i2c->dev, "READ: No Ack\n");				s3c24xx_i2c_stop(i2c, -ECONNREFUSED);				goto out_ack;			}		}		byte = readb(i2c->regs + S3C2410_IICDS);		i2c->msg->buf[i2c->msg_ptr++] = byte;	prepare_read:		if (is_msglast(i2c)) {			/* last byte of buffer */			if (is_lastmsg(i2c))				s3c24xx_i2c_disable_ack(i2c);					} else if (is_msgend(i2c)) {			/* ok, we've read the entire buffer, see if there			 * is anything else we need to do */			if (is_lastmsg(i2c)) {				/* last message, send stop and complete */				dev_dbg(i2c->dev, "READ: Send Stop\n");				s3c24xx_i2c_stop(i2c, 0);			} else {				/* go to the next transfer */				dev_dbg(i2c->dev, "READ: Next Transfer\n");				i2c->msg_ptr = 0;				i2c->msg_idx++;				i2c->msg++;			}		}		break;	}	/* acknowlegde the IRQ and get back on with the work */ out_ack:	tmp = readl(i2c->regs + S3C2410_IICCON);		tmp &= ~S3C2410_IICCON_IRQPEND;	writel(tmp, i2c->regs + S3C2410_IICCON); out:	return ret;}/* s3c24xx_i2c_irq * * top level IRQ servicing routine*/static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id,				   struct pt_regs *regs){	struct s3c24xx_i2c *i2c = dev_id;	unsigned long status;	unsigned long tmp;	status = readl(i2c->regs + S3C2410_IICSTAT);	if (status & S3C2410_IICSTAT_ARBITR) {		// deal with arbitration loss		dev_err(i2c->dev, "deal with arbitration loss\n");	}	if (i2c->state == STATE_IDLE) {		dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");		tmp = readl(i2c->regs + S3C2410_IICCON);			tmp &= ~S3C2410_IICCON_IRQPEND;		writel(tmp, i2c->regs +  S3C2410_IICCON);		goto out;	}		/* pretty much this leaves us with the fact that we've	 * transmitted or received whatever byte we last sent */	i2s_s3c_irq_nextbyte(i2c, status); out:	return IRQ_HANDLED;}/* s3c24xx_i2c_set_master * * get the i2c bus for a master transaction*/static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c){	unsigned long iicstat;	int timeout = 400;	while (timeout-- > 0) {		iicstat = readl(i2c->regs + S3C2410_IICSTAT);