; Copyright 1996, ESS Technology, Inc; SCCSID @(#)startup.s	1.25 5/14/98; ;	$Log$;; This version is based on version 2.2 of 3204 code.;; ROM loader source code.;; Assemble and link with the following switches:;       ax -R startup.s;       ld  -Ttext 0cfffde4 -e powerup -X -o startup.sun startup.o; Notice that we want the code to start at 0cfffe04, since there is a; 20h-byte header, we set the starting point of text to 0cfffde4.;; IMPORTANT : See ERS to see how to set RIFACE_WIDTH and RIFACE_WAITSTATE;             for different bank used as EPROM;; This file uses Bank3 as example;; address 4xxxxxx for bank1; address 8xxxxxx for bank2; address Cxxxxxx for bank3;; WHEN MAKING CHANGES TO THIS CODE, MAKE SURE THE FOLLOWING TWO LOCATIONS ; REMAIN UNCHANGED:;       powerup :     0x 0cff ff80;       LastLoc :     0x 0cff fffc;; This code accomplishes the following three things:;       1) Set up PSW;       2) Read commands and arguments prestored in ROM, and execute the;          commands to download code from ROM to SRAM.;       3) As the last step, a jump command is expected to goto a location;          specified by the argument. After a jump command, this code will;          never get control again.;; Diagram of ROM (suppose EPROM bank3 address base is 0xc000000);   ROM base |--------------|;  0xc000000 | ROM header   | size = 16 Bytes;            |--------------|;            | file 1       |;            |--------------|;                  .;           file 2 -- file N-1  ;                  .;            |--------------|;            | file N       |;            |--------------|;            | command      | size = 4 * 4 * cmdblkn (Bytes);            | block        |;            |--------------| ;            |              |;            |--------------| ;            | boot code    | entry point always set at 0x0cffff80;            |--------------| ; 0x0cfffffc | address of   | 4 Bytes;            | ROM header   |;            |--------------| ;; Since ESS' ROM emulator uses locations 0xc000000 and 0xc000004 to; communicate with the PC host, newer code usually starts at 0xc040000.; Since ROM is only 128K/256K, 0xc040000 is effectly the same as 0xc000000 ; from ROM's point's of view; however, emulator can depend on the bit 18; to differentiate ROM access versus emulator access.;; ROM header:;	1) Version (usually is the date when the ROM is made) (4B);	2) Starting location of command block (4B);	3) Number of entris in command block (4B);	4) Number of files (4B);		; ROM loader supports the folowing commands:;       1) COPY(1) : download data from ROM to SRAM;               Arguments : ROM_addr SRAM_addr size;		where:;                 - ROM_addr  is the byte address of data to be downloaded;                 - SRAM_addr is the target byte address to write to;                 - size      is the dword size of data to be written;       2) CLEAR(2) : clear a piece of SRAM to 0;               Arguments : SRAM_addr size;		where:;                 - SRAM_addr is the starting byte address to be cleared;                 - size      is the dword size of SRAM to be cleared;       3) JUMP(3) : jump to the given address;               Arguments : address;		where:;                 - address is the dword address of target code;       4) JSR(4) : call subroutine at given address;               Arguments : address;		where:;                 - address is the dword address of target subroutine;       5) SET24(5) : set value of r24;               Arguments: value;		where:;                 - value is the value;       6) SET25(6) : set value of r25;               Arguments: value;		where:	;                 - value is the value;       7) SET23(7) : set value of r23;               Arguments: value;		where:	;                 - value is the value	; Address of romheader is given at address 0x0cfffffc (LastLoc),; This is done by rom2;; The following macros have to be modified for various different setup:; 	0x7;		0x7	for bank 0 (simulation);		0x4ff	for bank 1;		0x8ff	for bank 2;		0xcff	for bank 3;; 	0x7ff;		see ERS;; 	0x801d ;		see ERS;        .data        .globl dstartdstart:        .globl _environ_environ:        .text	.globl powerup        .globl tstart        .globl _tstart        .globl LastLoc	.noreorg	        .def    RIFACE_WIDTH            =0x20004000        .def    RIFACE_WAIT_STATE       =0x20004004        .def    RIFACE_TURNOFF_DELAY    =0x20004008tstart:_tstart:;	Use EAUX12/13 to control A18 of ROM for 512K ROM;	SET/CLEAR EAUX12/13 according to value of r4Switch:        addi    r0,#0x1400,r2        lsl     r2,r2,#16       ; r2 = 0x14000000 (DSC data space)        addi    r0,#0x0c,r6        sb      0[r2],r6        ; 0xc : EAUX_DATA1(AUX8 - AUX15)         beq     r4,r0,L9        ; Clear(r4 = 0) or Set(r4 = 1)        nop     ;via slot (len 1)        addi    r0,#-33,r3      ; CLEAR_EAUX12(#-17) / CLEAR_EAUX_13(#-33)        addi    r0,#32,r3       ; SET_EAUX12(#16) / SET_EAUX_13(#32)L9:        sb      0[r2],r3        ; write data         addi    r0,#14,r3       ; dsc_aux1_ctl        sb      0[r2],r3        addi    r0,#32,r3       ; set enable bit(#16/#32 for EAUX12/13)        sb      0[r2],r3         addi r0,#0,r26                   ; Clear r26        addi r0,#0x1cff,r9               ; r9 = first half of last ROM loc.        sh   r0,r9,r9,#16                ; r9 << = 16 (0xcff0000)        addi r9,#0xfffc,r9               ; r9 = 0xcfffffc        ld   0x0[r9],r9                  ; r9 : location of romheader        nop        st   0xc[r0],r9                  ; save it        nop        beq r5,r0,TestLoc        nop        nop        ld   0x14[r9],r10                 ; r10 = cmdblkptr        ld   0x18[r9],r11                 ; r11 = cmdblkn        beq r0,r0,Cmdstart        nop        nop        TestLoc:        ld   0x4[r9],r10                 ; r10 = cmdblkptr        ld   0x8[r9],r11                 ; r11 = cmdblkn Cmdstart:        st   0x10[r0],r10                ; save it        st   0x14[r0],r11        beq r0,r0,LoopCmd        nop        mov  r0,r7                       ; r7 : loop counter forParseCmd:; struct romheader {;    longword version;;    longword cmdblkptr;        /* location of commands and arguments   */;    longword cmdblkn;          /* number of commands to be executed    */;    longword nfiles;           /* number of files in ROM               */; } header;; Each command occupies 4 dwords, the first one is command type, the other; three are arguments; Temp variables:;       r9 : address of romheader;       r10: start address of command block;       r11: number of commands to be executed;	addi r0,#0,r26			 ; Clear r26        addi r0,#0x1cff,r9         	 ; r9 = first half of last ROM loc.        sh   r0,r9,r9,#16                ; r9 << = 16 (0xcff0000)        addi r9,#0xfffc,r9               ; r9 = 0xcfffffc        ld   0x0[r9],r9                  ; r9 : location of romheader        nop        st   0xc[r0],r9                  ; save it        nop        ld   0x4[r9],r10                 ; r10 = cmdblkptr        nop        st   0x10[r0],r10                ; save it        nop        ld   0x8[r9],r11                 ; r11 = cmdblkn        nop        st   0x14[r0],r11        nop        mov  r0,r7                       ; r7 : loop counter for                                         ; executed commands LoopCmd:        ld   0x0[r10],r3                 ; r3 : first 4B is cmd type        addi r0,#0x1,r2                  ; r2 = 1 (COPY)        beq  r2,r3,Copy                  ; goto Copy        addi r0,#0x2,r2                  ; r2 = 2 (CLEAR)        nop        beq  r2,r3,Clear                 ; goto Clear        addi r0,#0x3,r2                  ; r2 = 3 (JUMP)        nop        beq  r2,r3,Jump                  ; goto Jump        addi r0,#0x4,r2                  ; r2 = 4 (JSR)        nop        beq  r2,r3,Jsr                   ; goto Jsr        addi r0,#0x5,r2                  ; r2 = 5 (SET24)        nop        beq  r2,r3,Set24                 ; goto Set24        addi r0,#0x6,r2                  ; r2 = 6 (SET25)