default:	switch (rh) {	  case 0:	    x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset);	    break;	  case 1:	    x86emu_fpu_illegal();	    break;	  case 2:	    x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset);	    break;	  case 3:	    x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset);	    break;	  case 4:	    x86emu_fpu_illegal();	    break;	  case 5:	    x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset);	    break;		      case 6:	    x86emu_fpu_illegal();	    break;	  case 7:	    x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset);	    break;	}    }#endif    DECODE_CLEAR_SEGOVR();    END_OF_INSTR_NO_TRACE();}#ifdef DEBUGchar *x86emu_fpu_op_dc_tab[] = {    "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",    "FCOMP\tQWORD PTR ",    "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",    "FDIVR\tQWORD PTR ",    "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",    "FCOMP\tQWORD PTR ",    "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",    "FDIVR\tQWORD PTR ",    "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",    "FCOMP\tQWORD PTR ",    "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",    "FDIVR\tQWORD PTR ",    "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t",    "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t",};#endif /* DEBUG *//* opcode=0xdc */void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1)){    int mod, rl, rh;	uint destoffset;    u8 stkelem;    START_OF_INSTR();    FETCH_DECODE_MODRM(mod, rh, rl);    DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl);    switch (mod) {      case 0:	destoffset = decode_rm00_address(rl);	DECODE_PRINTF("\n");	break;      case 1:	destoffset = decode_rm01_address(rl);	DECODE_PRINTF("\n");	break;      case 2:	destoffset = decode_rm10_address(rl);	DECODE_PRINTF("\n");	break;      case 3:                   /* register to register */		stkelem = (u8)rl;	DECODE_PRINTF2("\tST(%d),ST\n", stkelem);	break;    }#ifdef X86EMU_FPU_PRESENT    /* execute */    switch (mod) {      case 3:	switch (rh) {	  case 0:	    x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 1:	    x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 2:	    x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 3:	    x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 4:	    x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 5:	    x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 6:	    x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 7:	    x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP);	    break;	}	break;      default:	switch (rh) {	  case 0:	    x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 1:	    x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 2:	    x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 3:	    x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 4:	    x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 5:	    x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 6:	    x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 7:	    x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset);	    break;	}    }#endif    DECODE_CLEAR_SEGOVR();    END_OF_INSTR_NO_TRACE();}#ifdef DEBUGstatic char *x86emu_fpu_op_dd_tab[] = {    "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",    "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",    "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",    "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",    "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",    "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",    "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",    "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,",};#endif /* DEBUG *//* opcode=0xdd */void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1)){    int mod, rl, rh;	uint destoffset;    u8 stkelem;    START_OF_INSTR();    FETCH_DECODE_MODRM(mod, rh, rl);    DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl);    switch (mod) {      case 0:	destoffset = decode_rm00_address(rl);	DECODE_PRINTF("\n");	break;      case 1:	destoffset = decode_rm01_address(rl);	DECODE_PRINTF("\n");	break;      case 2:	destoffset = decode_rm10_address(rl);	DECODE_PRINTF("\n");	break;      case 3:                   /* register to register */		stkelem = (u8)rl;	DECODE_PRINTF2("\tST(%d),ST\n", stkelem);	break;    }#ifdef X86EMU_FPU_PRESENT    switch (mod) {      case 3:	switch (rh) {	  case 0:	    x86emu_fpu_R_ffree(stkelem);	    break;	  case 1:	    x86emu_fpu_R_fxch(stkelem);	    break;	  case 2:	    x86emu_fpu_R_fst(stkelem);  /* register version */	    break;	  case 3:	    x86emu_fpu_R_fstp(stkelem); /* register version */	    break;	  default:	    x86emu_fpu_illegal();	    break;	}	break;      default:	switch (rh) {	  case 0:	    x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 1:	    x86emu_fpu_illegal();	    break;	  case 2:	    x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 3:	    x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset);	    break;	  case 4:	    x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset);	    break;	  case 5:	    x86emu_fpu_illegal();	    break;	  case 6:	    x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset);	    break;	  case 7:	    x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset);	    break;	}    }#endif    DECODE_CLEAR_SEGOVR();    END_OF_INSTR_NO_TRACE();}#ifdef DEBUGstatic char *x86emu_fpu_op_de_tab[] ={    "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",    "FICOMP\tWORD PTR ",    "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",    "FIDIVR\tWORD PTR ",    "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",    "FICOMP\tWORD PTR ",    "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",    "FIDIVR\tWORD PTR ",    "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",    "FICOMP\tWORD PTR ",    "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",    "FIDIVR\tWORD PTR ",    "FADDP\t", "FMULP\t", "FCOMP\t", "FCOMPP\t",    "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t",};#endif /* DEBUG *//* opcode=0xde */void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1)){    int mod, rl, rh;	uint destoffset;    u8 stkelem;    START_OF_INSTR();    FETCH_DECODE_MODRM(mod, rh, rl);    DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl);    switch (mod) {      case 0:	destoffset = decode_rm00_address(rl);	DECODE_PRINTF("\n");	break;      case 1:	destoffset = decode_rm01_address(rl);	DECODE_PRINTF("\n");	break;      case 2:	destoffset = decode_rm10_address(rl);	DECODE_PRINTF("\n");	break;      case 3:                   /* register to register */		stkelem = (u8)rl;	DECODE_PRINTF2("\tST(%d),ST\n", stkelem);	break;    }#ifdef X86EMU_FPU_PRESENT    switch (mod) {      case 3:	switch (rh) {	  case 0:	    x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 1:	    x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 2:	    x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 3:	    if (stkelem == 1)	      x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP);	    else	      x86emu_fpu_illegal();	    break;	  case 4:	    x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 5:	    x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 6:	    x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP);	    break;	  case 7:	    x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP);	    break;	}	break;      default:	switch (rh) {	  case 0:	    x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset);	    break;	  case 1:	    x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset);	    break;	  case 2:	    x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset);	    break;	  case 3:	    x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset);	    break;	  case 4:	    x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset);	    break;	  case 5:	    x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset);	    break;	  case 6:	    x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset);	    break;	  case 7:	    x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset);	    break;	}    }#endif    DECODE_CLEAR_SEGOVR();    END_OF_INSTR_NO_TRACE();}#ifdef DEBUGstatic char *x86emu_fpu_op_df_tab[] = {    /* mod == 00 */    "FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",    "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",    "FISTP\tQWORD PTR ",    /* mod == 01 */    "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",    "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",    "FISTP\tQWORD PTR ",    /* mod == 10 */    "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",    "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",    "FISTP\tQWORD PTR ",    /* mod == 11 */    "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",    "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F,"};#endif /* DEBUG *//* opcode=0xdf */void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1)){    int mod, rl, rh;	uint destoffset;    u8 stkelem;    START_OF_INSTR();    FETCH_DECODE_MODRM(mod, rh, rl);    DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl);    switch (mod) {      case 0:	destoffset = decode_rm00_address(rl);	DECODE_PRINTF("\n");	break;      case 1:	destoffset = decode_rm01_address(rl);	DECODE_PRINTF("\n");	break;      case 2:	destoffset = decode_rm10_address(rl);	DECODE_PRINTF("\n");	break;      case 3:                   /* register to register */		stkelem = (u8)rl;	DECODE_PRINTF2("\tST(%d)\n", stkelem);	break;    }#ifdef X86EMU_FPU_PRESENT    switch (mod) {      case 3:	switch (rh) {	  case 0:	    x86emu_fpu_R_ffree(stkelem);	    break;	  case 1:	    x86emu_fpu_R_fxch(stkelem);	    break;	  case 2:	    x86emu_fpu_R_fst(stkelem);  /* register version */	    break;	  case 3:	    x86emu_fpu_R_fstp(stkelem); /* register version */	    break;	  default:	    x86emu_fpu_illegal();	    break;	}	break;      default:	switch (rh) {	  case 0:	    x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset);	    break;	  case 1:	    x86emu_fpu_illegal();	    break;	  case 2:	    x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset);	    break;	  case 3:	    x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset);	    break;	  case 4:	    x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset);	    break;	  case 5:	    x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset);	    break;	  case 6:	    x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset);	    break;	  case 7:	    x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset);	    break;	}    }#endif    DECODE_CLEAR_SEGOVR();    END_OF_INSTR_NO_TRACE();}