/* * (C) Copyright 2000 * Sangmoon Kim, Etin Systems. dogoil@etinsys.com. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */#include <common.h>#include <mpc824x.h>#include <pci.h>int checkboard (void){	/*TODO: Check processor type */	puts (	"Board: Debris "#ifdef CONFIG_MPC8240		"8240"#endif#ifdef CONFIG_MPC8245		"8245"#endif		" ##Test not implemented yet##\n");	return 0;}#if 0 	/* NOT USED */int checkflash (void){	/* TODO: XXX XXX XXX */	printf ("## Test not implemented yet ##\n");	return (0);}#endiflong int initdram (int board_type){	int		 i, cnt;	volatile uchar * base= CFG_SDRAM_BASE;	volatile ulong * addr;	ulong		 save[32];	ulong		 val, ret  = 0;	for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {		addr = (volatile ulong *)base + cnt;		save[i++] = *addr;		*addr = ~cnt;	}	addr = (volatile ulong *)base;	save[i] = *addr;	*addr = 0;	if (*addr != 0) {		*addr = save[i];		goto Done;	}	for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {		addr = (volatile ulong *)base + cnt;		val = *addr;		*addr = save[--i];		if (val != ~cnt) {/*			ulong new_bank0_end = cnt * sizeof(long) - 1;			ulong mear1  = mpc824x_mpc107_getreg(MEAR1);			ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);			mear1 =  (mear1  & 0xFFFFFF00) |			((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);			emear1 = (emear1 & 0xFFFFFF00) |			((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);			mpc824x_mpc107_setreg(MEAR1,  mear1);			mpc824x_mpc107_setreg(EMEAR1, emear1);*/			ret = cnt * sizeof(long);			goto Done;		}	}	ret = CFG_MAX_RAM_SIZE;Done:	return ret;}/* * Initialize PCI Devices, report devices found. */#ifndef CONFIG_PCI_PNPstatic struct pci_config_table pci_debris_config_table[] = {	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,				       PCI_ENET0_MEMADDR,				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,				       PCI_ENET1_MEMADDR,				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},	{ }};#endifstruct pci_controller hose = {#ifndef CONFIG_PCI_PNP	config_table: pci_debris_config_table,#endif};void pci_init_board(void){	pci_mpc824x_init(&hose);}void *nvram_read(void *dest, const long src, size_t count){	volatile uchar *d = (volatile uchar*) dest;	volatile uchar *s = (volatile uchar*) src;	while(count--) {		*d++ = *s++;		asm volatile("sync");	}	return dest;}void nvram_write(long dest, const void *src, size_t count){	volatile uchar *d = (volatile uchar*)dest;	volatile uchar *s = (volatile uchar*)src;	while(count--) {		*d++ = *s++;		asm volatile("sync");	}}int misc_init_r(void){	DECLARE_GLOBAL_DATA_PTR;	/* Write ethernet addr in NVRAM for VxWorks */	nvram_write(CFG_ENV_ADDR + CFG_NVRAM_VXWORKS_OFFS,			(char*)&gd->bd->bi_enetaddr[0], 6);	return 0;}