AREA BOOT, CODE, READONLY                                                     
	       ENTRY                           		; Mark first instruction to execute 


;vector table
    bal		RST_DO  
	bal		EXTENT_INSTRU
	bal		SWI_DO
	bal		ABORT_PREFETCH_DO
	bal		ABORT_DATA_DO
	mov		R1,		R1				;reserved exception
	bal		Irq_Do
	mov		r0, r0
	bal		Fiq_Do   
	;the code for the fiq

;*****************************************************************
;	init all the stacks under all CPU mode
;*****************************************************************	

	
RST_DO 
	EXPORT	RST_DO
	
	ldr		sp, =0x1fff5000  		;init sp_svc
	
		
;****************************************************************
; 	init the EMI and get the memory space
;****************************************************************

		ldr		r1, =0x11000004    ;THE ADD OF EMI_CSGBAB   
		ldr		r2, =0x24002000	                     
		str		r2, [ r1 ] 


		ldr		r1, =0x11000008    ;THE ADD OF EMI_CSGBCD   
		ldr		r2, =0x2c002800	                       
		str		r2, [ r1 ]     

		ldr		r1, =0x1100000c    ;THE ADD OF EMI_CSGBEF   
		ldr		r2, =0x34003000	                       
		str		r2, [ r1 ]     

		                          
		ldr		r1, =0x11000000        ;THE ADD OF EMIADDR_SMCONF
		ldr		r2, =0x9b0133ff
		str		r2, [ r1 ]

		ldr		r1, =0x11000014        ;THE ADD OF EMIADDR_SMCONF1
		ldr		r2, =0x0110a077	
		str		r2, [ r1 ]

		ldr		r1, =0x11000018        ;THE ADD OF EMIADDR_SMCONF2
		ldr		r2, =0x80000500
		str		r2, [ r1 ]
    
    	ldr		r1, =0x11000010    	;REMAP 0 ADDRESS TO SDRAM
		ldr		r2, =0x0000000b    	
		str		r2, [ r1 ] 



;配置工作頻率為60MHz

		ldr		r1, =0x1000100c
		ldr		r2, =0x17fff
		str		r2,[r1]
	        	
		ldr		r1, =0x10001014
		ldr		r2, =0x1
		str		r2,[r1]
	        	
		ldr		r1, =0x10001000
		ldr		r2, =0x018000cd
		str		r2,[r1]
	        	
		ldr		r1, =0x10001004
		ldr		r2, =0X230
		str		r2,[r1]
	        	
		ldr		r1, =0x10001004
		ldr		r2, =0X1230
		str		r2,[r1]


	
;***************************************************************
	IMPORT	__main
	b		__main 


;***********************************************************  

Irq_Do
 	b	Irq_Do
    
EXTENT_INSTRU                                                         
	b		EXTENT_INSTRU                                             
	                                                                  
SWI_DO                                                              
	b		SWI_DO                                                    
	                                                                  
ABORT_PREFETCH_DO                                                     
	b		ABORT_PREFETCH_DO                                         
	                                                                  
ABORT_DATA_DO                                                         
	b		ABORT_DATA_DO                                             
                                                                      
		                                                                                                            
	                                                                  
Fiq_Do                                                                
	b		Fiq_Do                                                    
                                                                      
	END