/* * Errata workarounds */typedef enum {       CHIP_ERRATA_R300_CG             = 0x00000001,       CHIP_ERRATA_PLL_DUMMYREADS      = 0x00000002,       CHIP_ERRATA_PLL_DELAY           = 0x00000004} RADEONErrata;typedef enum {	CARD_PCI,	CARD_AGP,	CARD_PCIE} RADEONCardType;typedef struct {    CARD32 freq;    CARD32 value;}RADEONTMDSPll;typedef struct {    EntityInfoPtr     pEnt;    pciVideoPtr       PciInfo;    PCITAG            PciTag;    int               Chipset;    RADEONChipFamily  ChipFamily;    RADEONErrata      ChipErrata;    Bool              FBDev;    unsigned long     LinearAddr;       /* Frame buffer physical address     */    unsigned long     MMIOAddr;         /* MMIO region physical address      */    unsigned long     BIOSAddr;         /* BIOS physical address             */    CARD32            fbLocation;    CARD32            gartLocation;    CARD32            mc_fb_location;    CARD32            mc_agp_location;    unsigned char     *MMIO;            /* Map of MMIO region                */    unsigned char     *FB;              /* Map of frame buffer               */    CARD8             *VBIOS;           /* Video BIOS pointer                */    Bool              IsAtomBios;       /* New BIOS used in R420 etc.        */    int               ROMHeaderStart;   /* Start of the ROM Info Table       */    int               MasterDataStart;  /* Offset for Master Data Table for ATOM BIOS */    CARD32            MemCntl;    CARD32            BusCntl;    unsigned long     MMIOSize;         /* MMIO region physical address      */    unsigned long     FbMapSize;        /* Size of frame buffer, in bytes    */    unsigned long     FbSecureSize;     /* Size of secured fb area at end of                                           framebuffer */    int               Flags;            /* Saved copy of mode flags          */				/* VE/M6 support */    RADEONMonitorType DisplayType;      /* Monitor connected on              */    RADEONDDCType     DDCType;    RADEONConnectorType ConnectorType;    Bool              HasCRTC2;         /* All cards except original Radeon  */    Bool              IsMobility;       /* Mobile chips for laptops */    Bool              IsIGP;            /* IGP chips */    Bool              HasSingleDAC;     /* only TVDAC on chip */    Bool              IsSecondary;      /* Second Screen                     */    Bool	      IsPrimary;        /* Primary Screen */    Bool              IsSwitching;      /* Flag for switching mode           */    Bool              OverlayOnCRTC2;    Bool              PanelOff;         /* Force panel (LCD/DFP) off         */    Bool              ddc_mode;         /* Validate mode by matching exactly					 * the modes supported in DDC data					 */    Bool              R300CGWorkaround;				/* EDID or BIOS values for FPs */    int               PanelXRes;    int               PanelYRes;    int               HOverPlus;    int               HSyncWidth;    int               HBlank;    int               VOverPlus;    int               VSyncWidth;    int               VBlank;    int               PanelPwrDly;    int               DotClock;    int               RefDivider;    int               FeedbackDivider;    int               PostDivider;    Bool              UseBiosDividers;				/* EDID data using DDC interface */    Bool              ddc_bios;    Bool              ddc1;    Bool              ddc2;    I2CBusPtr         pI2CBus;    CARD32            DDCReg;    RADEONPLLRec      pll;    RADEONTMDSPll     tmds_pll[4];    int               RamWidth;    float	      sclk;		/* in MHz */    float	      mclk;		/* in MHz */    Bool	      IsDDR;    int               DispPriority;    RADEONSaveRec     SavedReg;         /* Original (text) mode              */    RADEONSaveRec     ModeReg;          /* Current mode                      */    Bool              (*CloseScreen)(int, ScreenPtr);    void              (*BlockHandler)(int, pointer, pointer, pointer);    Bool              PaletteSavedOnVT; /* Palette saved on last VT switch   */#ifdef USE_EXA    ExaDriverPtr      exa;    int               engineMode;#define EXA_ENGINEMODE_UNKNOWN 0#define EXA_ENGINEMODE_2D      1#define EXA_ENGINEMODE_3D      2#ifdef XF86DRI    Bool              accelDFS;#endif#endif#ifdef USE_XAA    XAAInfoRecPtr     accel;#endif    Bool              accelOn;    xf86CursorInfoPtr cursor;    CARD32            cursor_offset;#ifdef USE_XAA    unsigned long     cursor_end;#endif    Bool              allowColorTiling;    Bool              tilingEnabled; /* mirror of sarea->tiling_enabled */#ifdef ARGB_CURSOR    Bool	      cursor_argb;#endif    int               cursor_fg;    int               cursor_bg;#ifdef USE_XAA    /*     * XAAForceTransBlit is used to change the behavior of the XAA     * SetupForScreenToScreenCopy function, to make it DGA-friendly.     */    Bool              XAAForceTransBlit;#endif    int               fifo_slots;       /* Free slots in the FIFO (64 max)   */    int               pix24bpp;         /* Depth of pixmap for 24bpp fb      */    Bool              dac6bits;         /* Use 6 bit DAC?                    */				/* Computed values for Radeon */    int               pitch;    int               datatype;    CARD32            dp_gui_master_cntl;    CARD32            dp_gui_master_cntl_clip;    CARD32            trans_color;				/* Saved values for ScreenToScreenCopy */    int               xdir;    int               ydir;#ifdef USE_XAA				/* ScanlineScreenToScreenColorExpand support */    unsigned char     *scratch_buffer[1];    unsigned char     *scratch_save;    int               scanline_x;    int               scanline_y;    int               scanline_w;    int               scanline_h;    int               scanline_h_w;    int               scanline_words;    int               scanline_direct;    int               scanline_bpp;     /* Only used for ImageWrite */    int               scanline_fg;    int               scanline_bg;    int               scanline_hpass;    int               scanline_x1clip;    int               scanline_x2clip;#endif				/* Saved values for DashedTwoPointLine */    int               dashLen;    CARD32            dashPattern;    int               dash_fg;    int               dash_bg;    DGAModePtr        DGAModes;    int               numDGAModes;    Bool              DGAactive;    int               DGAViewportStatus;    DGAFunctionRec    DGAFuncs;    RADEONFBLayout    CurrentLayout;    CARD32            dst_pitch_offset;#ifdef XF86DRI    Bool              noBackBuffer;	    Bool              directRenderingEnabled;    Bool              directRenderingInited;    Bool              newMemoryMap;    drmVersionPtr     pLibDRMVersion;    drmVersionPtr     pKernelDRMVersion;    DRIInfoPtr        pDRIInfo;    int               drmFD;    int               numVisualConfigs;    __GLXvisualConfig *pVisualConfigs;    RADEONConfigPrivPtr pVisualConfigsPriv;    Bool             (*DRICloseScreen)(int, ScreenPtr);    drm_handle_t         fbHandle;    drmSize           registerSize;    drm_handle_t         registerHandle;    RADEONCardType    cardType;            /* Current card is a PCI card */    drmSize           pciSize;    drm_handle_t         pciMemHandle;    unsigned char     *PCI;             /* Map */    Bool              depthMoves;       /* Enable depth moves -- slow! */    Bool              allowPageFlip;    /* Enable 3d page flipping */    Bool              have3DWindows;    /* Are there any 3d clients? */    drmSize           gartSize;    drm_handle_t         agpMemHandle;     /* Handle from drmAgpAlloc */    unsigned long     gartOffset;    unsigned char     *AGP;             /* Map */    int               agpMode;    int               agpFastWrite;    CARD32            pciCommand;    Bool              CPRuns;           /* CP is running */    Bool              CPInUse;          /* CP has been used by X server */    Bool              CPStarted;        /* CP has started */    int               CPMode;           /* CP mode that server/clients use */    int               CPFifoSize;       /* Size of the CP command FIFO */    int               CPusecTimeout;    /* CP timeout in usecs */				/* CP ring buffer data */    unsigned long     ringStart;        /* Offset into GART space */    drm_handle_t         ringHandle;       /* Handle from drmAddMap */    drmSize           ringMapSize;      /* Size of map */    int               ringSize;         /* Size of ring (in MB) */    drmAddress        ring;             /* Map */    int               ringSizeLog2QW;    unsigned long     ringReadOffset;   /* Offset into GART space */    drm_handle_t         ringReadPtrHandle; /* Handle from drmAddMap */    drmSize           ringReadMapSize;  /* Size of map */    drmAddress        ringReadPtr;      /* Map */				/* CP vertex/indirect buffer data */    unsigned long     bufStart;         /* Offset into GART space */    drm_handle_t         bufHandle;        /* Handle from drmAddMap */    drmSize           bufMapSize;       /* Size of map */    int               bufSize;          /* Size of buffers (in MB) */    drmAddress        buf;              /* Map */    int               bufNumBufs;       /* Number of buffers */    drmBufMapPtr      buffers;          /* Buffer map */				/* CP GART Texture data */    unsigned long     gartTexStart;      /* Offset into GART space */    drm_handle_t         gartTexHandle;     /* Handle from drmAddMap */    drmSize           gartTexMapSize;    /* Size of map */    int               gartTexSize;       /* Size of GART tex space (in MB) */    drmAddress        gartTex;           /* Map */    int               log2GARTTexGran;				/* CP accleration */    drmBufPtr         indirectBuffer;    int               indirectStart;				/* DRI screen private data */    int               fbX;    int               fbY;    int               backX;    int               backY;    int               depthX;    int               depthY;    int               frontOffset;    int               frontPitch;    int               backOffset;    int               backPitch;    int               depthOffset;    int               depthPitch;    int               depthBits;    int               textureOffset;    int               textureSize;    int               log2TexGran;    int               pciGartSize;    CARD32            pciGartOffset;    void              *pciGartBackup;#ifdef USE_XAA    CARD32            frontPitchOffset;    CARD32            backPitchOffset;    CARD32            depthPitchOffset;				/* offscreen memory management */    int               backLines;    FBAreaPtr         backArea;    int               depthTexLines;    FBAreaPtr         depthTexArea;#endif				/* Saved scissor values */    CARD32            sc_left;    CARD32            sc_right;    CARD32            sc_top;    CARD32            sc_bottom;    CARD32            re_top_left;    CARD32            re_width_height;    CARD32            aux_sc_cntl;    int               irq;    Bool              DMAForXv;#ifdef PER_CONTEXT_SAREA    int               perctx_sarea_size;#endif    /* Debugging info for BEGIN_RING/ADVANCE_RING pairs. */    int               dma_begin_count;    char              *dma_debug_func;    int               dma_debug_lineno;#endif /* XF86DRI */				/* XVideo */    XF86VideoAdaptorPtr adaptor;    void              (*VideoTimerCallback)(ScrnInfoPtr, Time);    int               videoKey;    int		      RageTheatreCrystal;    int               RageTheatreTunerPort;    int               RageTheatreCompositePort;    int               RageTheatreSVideoPort;    int               tunerType;	char*			RageTheatreMicrocPath;	char*			RageTheatreMicrocType;    Bool               MM_TABLE_valid;    struct {    	CARD8 table_revision;	CARD8 table_size;        CARD8 tuner_type;        CARD8 audio_chip;        CARD8 product_id;        CARD8 tuner_voltage_teletext_fm;        CARD8 i2s_config; /* configuration of the sound chip */        CARD8 video_decoder_type;        CARD8 video_decoder_host_config;        CARD8 input[5];    	} MM_TABLE;    CARD16 video_decoder_type;    /* Render */    Bool              RenderAccel;#ifdef USE_XAA    FBLinearPtr       RenderTex;    void              (*RenderCallback)(ScrnInfoPtr);    Time              RenderTimeout;#endif    /* general */    Bool              showCache;    OptionInfoPtr     Options;    Bool              useEXA;#ifdef XFree86LOADER