#ifdef HAVE_CONFIG_H#include "config.h"#endif#include <unistd.h>#include "xf86.h"#include "generic_bus.h"#include "theatre.h"#include "theatre_reg.h"#undef read#undef write#undef ioctlstatic Bool theatre_read(TheatrePtr t,CARD32 reg, CARD32 *data){   if(t->theatre_num<0)return FALSE;   return t->VIP->read(t->VIP, ((t->theatre_num & 0x3)<<14) | reg,4, (CARD8 *) data);}static Bool theatre_write(TheatrePtr t,CARD32 reg, CARD32 data){   if(t->theatre_num<0)return FALSE;   return t->VIP->write(t->VIP,((t->theatre_num & 0x03)<<14) | reg,4, (CARD8 *) &data);}#define RT_regr(reg,data)	theatre_read(t,(reg),(data))#define RT_regw(reg,data)	theatre_write(t,(reg),(data))#define VIP_TYPE      "ATI VIP BUS"#if 0TheatrePtr DetectTheatre(GENERIC_BUS_Ptr b){   TheatrePtr t;     CARD32 i;   CARD32 val;   char s[20];      b->ioctl(b,GB_IOCTL_GET_TYPE,20,s);   if(strcmp(VIP_TYPE, s)){   xf86DrvMsg(b->scrnIndex, X_ERROR, "DetectTheatre must be called with bus of type \"%s\", not \"%s\"\n",          VIP_TYPE, s);   return NULL;   }      t = xcalloc(1,sizeof(TheatreRec));   t->VIP = b;   t->theatre_num = -1;   t->mode=MODE_UNINITIALIZED;      b->read(b, VIP_VIP_VENDOR_DEVICE_ID, 4, (CARD8 *)&val);   for(i=0;i<4;i++)   {	if(b->read(b, ((i & 0x03)<<14) | VIP_VIP_VENDOR_DEVICE_ID, 4, (CARD8 *)&val))        {	  if(val)xf86DrvMsg(b->scrnIndex, X_INFO, "Device %d on VIP bus ids as 0x%08x\n",i,val);	  if(t->theatre_num>=0)continue; /* already found one instance */	  switch(val){	  	case RT100_ATI_ID:	           t->theatre_num=i;		   t->theatre_id=RT100_ATI_ID;		   break;		case RT200_ATI_ID:	           t->theatre_num=i;		   t->theatre_id=RT200_ATI_ID;		   break;                }	} else {	  xf86DrvMsg(b->scrnIndex, X_INFO, "No response from device %d on VIP bus\n",i);		}   }   if(t->theatre_num>=0)xf86DrvMsg(b->scrnIndex, X_INFO, "Detected Rage Theatre as device %d on VIP bus with id 0x%08x\n",t->theatre_num,t->theatre_id);   if(t->theatre_id==RT200_ATI_ID){   	xf86DrvMsg(b->scrnIndex, X_INFO, "Rage Theatre 200 is not supported yet\n");	t->theatre_num=-1;	}   if(t->theatre_num < 0)   {   xfree(t);   return NULL;   }   RT_regr(VIP_VIP_REVISION_ID, &val);   xf86DrvMsg(b->scrnIndex, X_INFO, "Detected Rage Theatre revision %8.8X\n", val);#if 0DumpRageTheatreRegsByName(t);#endif   return t;}#endifenum{fld_tmpReg1=0,fld_tmpReg2,fld_tmpReg3,fld_LP_CONTRAST,fld_LP_BRIGHTNESS,fld_CP_HUE_CNTL,fld_LUMA_FILTER,fld_H_SCALE_RATIO,fld_H_SHARPNESS,fld_V_SCALE_RATIO,fld_V_DEINTERLACE_ON,fld_V_BYPSS,fld_V_DITHER_ON,fld_EVENF_OFFSET,fld_ODDF_OFFSET,fld_INTERLACE_DETECTED,fld_VS_LINE_COUNT,fld_VS_DETECTED_LINES,fld_VS_ITU656_VB,fld_VBI_CC_DATA,fld_VBI_CC_WT,fld_VBI_CC_WT_ACK,fld_VBI_CC_HOLD,fld_VBI_DECODE_EN,fld_VBI_CC_DTO_P,fld_VBI_20BIT_DTO_P,fld_VBI_CC_LEVEL,fld_VBI_20BIT_LEVEL,fld_VBI_CLK_RUNIN_GAIN,fld_H_VBI_WIND_START,fld_H_VBI_WIND_END,fld_V_VBI_WIND_START,fld_V_VBI_WIND_END,fld_VBI_20BIT_DATA0,fld_VBI_20BIT_DATA1,fld_VBI_20BIT_WT,fld_VBI_20BIT_WT_ACK,fld_VBI_20BIT_HOLD,fld_VBI_CAPTURE_ENABLE,fld_VBI_EDS_DATA,fld_VBI_EDS_WT,fld_VBI_EDS_WT_ACK,fld_VBI_EDS_HOLD,fld_VBI_SCALING_RATIO,fld_VBI_ALIGNER_ENABLE,fld_H_ACTIVE_START,fld_H_ACTIVE_END,fld_V_ACTIVE_START,fld_V_ACTIVE_END,fld_CH_HEIGHT,fld_CH_KILL_LEVEL,fld_CH_AGC_ERROR_LIM,fld_CH_AGC_FILTER_EN,fld_CH_AGC_LOOP_SPEED,fld_HUE_ADJ,fld_STANDARD_SEL,fld_STANDARD_YC,fld_ADC_PDWN,fld_INPUT_SELECT,fld_ADC_PREFLO,fld_H_SYNC_PULSE_WIDTH,fld_HS_GENLOCKED,fld_HS_SYNC_IN_WIN,fld_VIN_ASYNC_RST,fld_DVS_ASYNC_RST,fld_VIP_VENDOR_ID,fld_VIP_DEVICE_ID,fld_VIP_REVISION_ID,fld_BLACK_INT_START,fld_BLACK_INT_LENGTH,fld_UV_INT_START,fld_U_INT_LENGTH,fld_V_INT_LENGTH,fld_CRDR_ACTIVE_GAIN,fld_CBDB_ACTIVE_GAIN,fld_DVS_DIRECTION,fld_DVS_VBI_CARD8_SWAP,fld_DVS_CLK_SELECT,fld_CONTINUOUS_STREAM,fld_DVSOUT_CLK_DRV,fld_DVSOUT_DATA_DRV,fld_COMB_CNTL0,fld_COMB_CNTL1,fld_COMB_CNTL2,fld_COMB_LENGTH,fld_SYNCTIP_REF0,fld_SYNCTIP_REF1,fld_CLAMP_REF,fld_AGC_PEAKWHITE,fld_VBI_PEAKWHITE,fld_WPA_THRESHOLD,fld_WPA_TRIGGER_LO,fld_WPA_TRIGGER_HIGH,fld_LOCKOUT_START,fld_LOCKOUT_END,fld_CH_DTO_INC,fld_PLL_SGAIN,fld_PLL_FGAIN,fld_CR_BURST_GAIN,fld_CB_BURST_GAIN,fld_VERT_LOCKOUT_START,fld_VERT_LOCKOUT_END,fld_H_IN_WIND_START,fld_V_IN_WIND_START,fld_H_OUT_WIND_WIDTH,fld_V_OUT_WIND_WIDTH,fld_HS_LINE_TOTAL,fld_MIN_PULSE_WIDTH,fld_MAX_PULSE_WIDTH,fld_WIN_CLOSE_LIMIT,fld_WIN_OPEN_LIMIT,fld_VSYNC_INT_TRIGGER,fld_VSYNC_INT_HOLD,fld_VIN_M0,fld_VIN_N0,fld_MNFLIP_EN,fld_VIN_P,fld_REG_CLK_SEL,fld_VIN_M1,fld_VIN_N1,fld_VIN_DRIVER_SEL,fld_VIN_MNFLIP_REQ,fld_VIN_MNFLIP_DONE,fld_TV_LOCK_TO_VIN,fld_TV_P_FOR_WINCLK,fld_VINRST,fld_VIN_CLK_SEL,fld_VS_FIELD_BLANK_START,fld_VS_FIELD_BLANK_END,fld_VS_FIELD_IDLOCATION,fld_VS_FRAME_TOTAL,fld_SYNC_TIP_START,fld_SYNC_TIP_LENGTH,fld_GAIN_FORCE_DATA,fld_GAIN_FORCE_EN,fld_I_CLAMP_SEL,fld_I_AGC_SEL,fld_EXT_CLAMP_CAP,fld_EXT_AGC_CAP,fld_DECI_DITHER_EN,fld_ADC_PREFHI,fld_ADC_CH_GAIN_SEL,fld_HS_PLL_SGAIN,fld_NREn,fld_NRGainCntl,fld_NRBWTresh,fld_NRGCTresh,fld_NRCoefDespeclMode,fld_GPIO_5_OE,fld_GPIO_6_OE,fld_GPIO_5_OUT,fld_GPIO_6_OUT,regRT_MAX_REGS} a;typedef struct {	CARD8 size;	CARD32 fld_id;	CARD32 dwRegAddrLSBs;	CARD32 dwFldOffsetLSBs;	CARD32 dwMaskLSBs;	CARD32 addr2;	CARD32 offs2;	CARD32 mask2;	CARD32 dwCurrValue;	CARD32 rw;	} RTREGMAP;#define READONLY 1#define WRITEONLY 2#define READWRITE 3/* Rage Theatre's Register Mappings, including the default values: */RTREGMAP RT_RegMap[regRT_MAX_REGS]={/*{size, fidname, AddrOfst, Ofst, Mask, Addr, Ofst, Mask, Cur, R/W*/{32 , fld_tmpReg1       ,0x151                          , 0, 0x0, 0, 0,0, 0,READWRITE },{1  , fld_tmpReg2       ,VIP_VIP_SUB_VENDOR_DEVICE_ID   , 3, 0xFFFFFFFF, 0, 0,0, 0,READWRITE },{1  , fld_tmpReg3       ,VIP_VIP_COMMAND_STATUS         , 3, 0xFFFFFFFF, 0, 0,0, 0,READWRITE },{8  , fld_LP_CONTRAST   ,VIP_LP_CONTRAST            ,  0, 0xFFFFFF00, 0, 0,0, fld_LP_CONTRAST_def       ,READWRITE  },{14 , fld_LP_BRIGHTNESS ,VIP_LP_BRIGHTNESS          ,  0, 0xFFFFC000, 0, 0,0, fld_LP_BRIGHTNESS_def     ,READWRITE  },{8  , fld_CP_HUE_CNTL   ,VIP_CP_HUE_CNTL            ,  0, 0xFFFFFF00, 0, 0,0, fld_CP_HUE_CNTL_def       ,READWRITE  },{1  , fld_LUMA_FILTER   ,VIP_LP_BRIGHTNESS          , 15, 0xFFFF7FFF, 0, 0,0, fld_LUMA_FILTER_def       ,READWRITE  },{21 , fld_H_SCALE_RATIO ,VIP_H_SCALER_CONTROL       ,  0, 0xFFE00000, 0, 0,0, fld_H_SCALE_RATIO_def     ,READWRITE  },{4  , fld_H_SHARPNESS   ,VIP_H_SCALER_CONTROL       , 25, 0xE1FFFFFF, 0, 0,0, fld_H_SHARPNESS_def       ,READWRITE  },{12 , fld_V_SCALE_RATIO ,VIP_V_SCALER_CONTROL       ,  0, 0xFFFFF000, 0, 0,0, fld_V_SCALE_RATIO_def     ,READWRITE  },{1  , fld_V_DEINTERLACE_ON,VIP_V_SCALER_CONTROL     , 12, 0xFFFFEFFF, 0, 0,0, fld_V_DEINTERLACE_ON_def  ,READWRITE  },{1  , fld_V_BYPSS       ,VIP_V_SCALER_CONTROL       , 14, 0xFFFFBFFF, 0, 0,0, fld_V_BYPSS_def           ,READWRITE  },{1  , fld_V_DITHER_ON   ,VIP_V_SCALER_CONTROL       , 15, 0xFFFF7FFF, 0, 0,0, fld_V_DITHER_ON_def       ,READWRITE  },{11 , fld_EVENF_OFFSET  ,VIP_V_DEINTERLACE_CONTROL  ,  0, 0xFFFFF800, 0, 0,0, fld_EVENF_OFFSET_def      ,READWRITE  },{11 , fld_ODDF_OFFSET   ,VIP_V_DEINTERLACE_CONTROL  , 11, 0xFFC007FF, 0, 0,0, fld_ODDF_OFFSET_def       ,READWRITE  },{1  , fld_INTERLACE_DETECTED    ,VIP_VS_LINE_COUNT  , 15, 0xFFFF7FFF, 0, 0,0, fld_INTERLACE_DETECTED_def,READONLY   },{10 , fld_VS_LINE_COUNT     ,VIP_VS_LINE_COUNT      ,  0, 0xFFFFFC00, 0, 0,0, fld_VS_LINE_COUNT_def     ,READONLY   },{10 , fld_VS_DETECTED_LINES ,VIP_VS_LINE_COUNT      , 16, 0xFC00FFFF, 0, 0,0, fld_VS_DETECTED_LINES_def ,READONLY   },{1  , fld_VS_ITU656_VB  ,VIP_VS_LINE_COUNT          , 13, 0xFFFFDFFF, 0, 0,0, fld_VS_ITU656_VB_def  ,READONLY   },{16 , fld_VBI_CC_DATA   ,VIP_VBI_CC_CNTL            ,  0, 0xFFFF0000, 0, 0,0, fld_VBI_CC_DATA_def       ,READWRITE  },{1  , fld_VBI_CC_WT     ,VIP_VBI_CC_CNTL            , 24, 0xFEFFFFFF, 0, 0,0, fld_VBI_CC_WT_def         ,READWRITE  },{1  , fld_VBI_CC_WT_ACK ,VIP_VBI_CC_CNTL            , 25, 0xFDFFFFFF, 0, 0,0, fld_VBI_CC_WT_ACK_def     ,READONLY   },{1  , fld_VBI_CC_HOLD   ,VIP_VBI_CC_CNTL            , 26, 0xFBFFFFFF, 0, 0,0, fld_VBI_CC_HOLD_def       ,READWRITE  },{1  , fld_VBI_DECODE_EN ,VIP_VBI_CC_CNTL            , 31, 0x7FFFFFFF, 0, 0,0, fld_VBI_DECODE_EN_def     ,READWRITE  },{16 , fld_VBI_CC_DTO_P  ,VIP_VBI_DTO_CNTL           ,  0, 0xFFFF0000, 0, 0,0, fld_VBI_CC_DTO_P_def      ,READWRITE  },{16 ,fld_VBI_20BIT_DTO_P,VIP_VBI_DTO_CNTL           , 16, 0x0000FFFF, 0, 0,0, fld_VBI_20BIT_DTO_P_def   ,READWRITE  },{7  ,fld_VBI_CC_LEVEL   ,VIP_VBI_LEVEL_CNTL         ,  0, 0xFFFFFF80, 0, 0,0, fld_VBI_CC_LEVEL_def      ,READWRITE  },{7  ,fld_VBI_20BIT_LEVEL,VIP_VBI_LEVEL_CNTL         ,  8, 0xFFFF80FF, 0, 0,0, fld_VBI_20BIT_LEVEL_def   ,READWRITE  },{9  ,fld_VBI_CLK_RUNIN_GAIN,VIP_VBI_LEVEL_CNTL      , 16, 0xFE00FFFF, 0, 0,0, fld_VBI_CLK_RUNIN_GAIN_def,READWRITE  },{11 ,fld_H_VBI_WIND_START,VIP_H_VBI_WINDOW          ,  0, 0xFFFFF800, 0, 0,0, fld_H_VBI_WIND_START_def  ,READWRITE  },{11 ,fld_H_VBI_WIND_END,VIP_H_VBI_WINDOW            , 16, 0xF800FFFF, 0, 0,0, fld_H_VBI_WIND_END_def    ,READWRITE  },{10 ,fld_V_VBI_WIND_START,VIP_V_VBI_WINDOW          ,  0, 0xFFFFFC00, 0, 0,0, fld_V_VBI_WIND_START_def  ,READWRITE  },{10 ,fld_V_VBI_WIND_END,VIP_V_VBI_WINDOW            , 16, 0xFC00FFFF, 0, 0,0, fld_V_VBI_WIND_END_def    ,READWRITE  }, /* CHK */{16 ,fld_VBI_20BIT_DATA0,VIP_VBI_20BIT_CNTL         ,  0, 0xFFFF0000, 0, 0,0, fld_VBI_20BIT_DATA0_def   ,READWRITE  },{4  ,fld_VBI_20BIT_DATA1,VIP_VBI_20BIT_CNTL         , 16, 0xFFF0FFFF, 0, 0,0, fld_VBI_20BIT_DATA1_def   ,READWRITE  },