/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.26 2003/11/06 18:37:58 tsi Exp $ *//* * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, *                      Precision Insight, Inc., Cedar Park, Texas, and *                      VA Linux Systems Inc., Fremont, California. * * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation on the rights to use, copy, modify, merge, * publish, distribute, sublicense, and/or sell copies of the Software, * and to permit persons to whom the Software is furnished to do so, * subject to the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial * portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. *//* * Authors: *   Rickard E. Faith <faith@valinux.com> *   Kevin E. Martin <martin@valinux.com> * */#ifndef _R128_H_#define _R128_H_#include <unistd.h>#include "xf86str.h"				/* PCI support */#include "xf86Pci.h"				/* XAA and Cursor Support */#include "xaa.h"#include "xf86Cursor.h"				/* DDC support */#include "xf86DDC.h"				/* Xv support */#include "xf86xv.h"#include "r128_probe.h"				/* DRI support */#ifdef XF86DRI#define _XF86DRI_SERVER_#include "r128_dripriv.h"#include "dri.h"#include "GL/glxint.h"#endif#define R128_DEBUG          0   /* Turn off debugging output               */#define R128_IDLE_RETRY    32   /* Fall out of idle loops after this count */#define R128_TIMEOUT  2000000   /* Fall out of wait loops after this count */#define R128_MMIOSIZE  0x4000#define R128_VBIOS_SIZE 0x00010000#if R128_DEBUG#define R128TRACE(x)                                          \    do {                                                      \	ErrorF("(**) %s(%d): ", R128_NAME, pScrn->scrnIndex); \	ErrorF x;                                             \    } while (0);#else#define R128TRACE(x)#endif/* Other macros */#define R128_ARRAY_SIZE(x)  (sizeof(x)/sizeof(x[0]))#define R128_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))#define R128PTR(pScrn) ((R128InfoPtr)(pScrn)->driverPrivate)typedef struct {        /* All values in XCLKS    */    int  ML;            /* Memory Read Latency    */    int  MB;            /* Memory Burst Length    */    int  Trcd;          /* RAS to CAS delay       */    int  Trp;           /* RAS percentage         */    int  Twr;           /* Write Recovery         */    int  CL;            /* CAS Latency            */    int  Tr2w;          /* Read to Write Delay    */    int  Rloop;         /* Loop Latency           */    int  Rloop_fudge;   /* Add to ML to get Rloop */    char *name;} R128RAMRec, *R128RAMPtr;typedef struct {				/* Common registers */    CARD32     ovr_clr;    CARD32     ovr_wid_left_right;    CARD32     ovr_wid_top_bottom;    CARD32     ov0_scale_cntl;    CARD32     mpp_tb_config;    CARD32     mpp_gp_config;    CARD32     subpic_cntl;    CARD32     viph_control;    CARD32     i2c_cntl_1;    CARD32     gen_int_cntl;    CARD32     cap0_trig_cntl;    CARD32     cap1_trig_cntl;    CARD32     bus_cntl;    CARD32     config_cntl;				/* Other registers to save for VT switches */    CARD32     dp_datatype;    CARD32     gen_reset_cntl;    CARD32     clock_cntl_index;    CARD32     amcgpio_en_reg;    CARD32     amcgpio_mask;				/* CRTC registers */    CARD32     crtc_gen_cntl;    CARD32     crtc_ext_cntl;    CARD32     dac_cntl;    CARD32     crtc_h_total_disp;    CARD32     crtc_h_sync_strt_wid;    CARD32     crtc_v_total_disp;    CARD32     crtc_v_sync_strt_wid;    CARD32     crtc_offset;    CARD32     crtc_offset_cntl;    CARD32     crtc_pitch;				/* CRTC2 registers */    CARD32     crtc2_gen_cntl;    CARD32     crtc2_h_total_disp;    CARD32     crtc2_h_sync_strt_wid;    CARD32     crtc2_v_total_disp;    CARD32     crtc2_v_sync_strt_wid;    CARD32     crtc2_offset;    CARD32     crtc2_offset_cntl;    CARD32     crtc2_pitch;				/* Flat panel registers */    CARD32     fp_crtc_h_total_disp;    CARD32     fp_crtc_v_total_disp;    CARD32     fp_gen_cntl;    CARD32     fp_h_sync_strt_wid;    CARD32     fp_horz_stretch;    CARD32     fp_panel_cntl;    CARD32     fp_v_sync_strt_wid;    CARD32     fp_vert_stretch;    CARD32     lvds_gen_cntl;    CARD32     tmds_crc;    CARD32     tmds_transmitter_cntl;				/* Computed values for PLL */    CARD32     dot_clock_freq;    CARD32     pll_output_freq;    int        feedback_div;    int        post_div;				/* PLL registers */    CARD32     ppll_ref_div;    CARD32     ppll_div_3;    CARD32     htotal_cntl;				/* Computed values for PLL2 */    CARD32     dot_clock_freq_2;    CARD32     pll_output_freq_2;    int        feedback_div_2;    int        post_div_2;				/* PLL2 registers */    CARD32     p2pll_ref_div;    CARD32     p2pll_div_0;    CARD32     htotal_cntl2;				/* DDA register */    CARD32     dda_config;    CARD32     dda_on_off;				/* DDA2 register */    CARD32     dda2_config;    CARD32     dda2_on_off;				/* Pallet */    Bool       palette_valid;    CARD32     palette[256];    CARD32     palette2[256];} R128SaveRec, *R128SavePtr;typedef struct {    CARD16        reference_freq;    CARD16        reference_div;    unsigned      min_pll_freq;    unsigned      max_pll_freq;    CARD16        xclk;} R128PLLRec, *R128PLLPtr;typedef struct {    int                bitsPerPixel;    int                depth;    int                displayWidth;    int                pixel_code;    int                pixel_bytes;    DisplayModePtr     mode;} R128FBLayout;typedef enum{    MT_NONE,    MT_CRT,    MT_LCD,    MT_DFP,    MT_CTV,    MT_STV} R128MonitorType;typedef struct {    EntityInfoPtr     pEnt;    pciVideoPtr       PciInfo;    PCITAG            PciTag;    int               Chipset;    Bool              Primary;    Bool              FBDev;    unsigned long     LinearAddr;   /* Frame buffer physical address         */    unsigned long     MMIOAddr;     /* MMIO region physical address          */    unsigned long     BIOSAddr;     /* BIOS physical address                 */    unsigned char     *MMIO;        /* Map of MMIO region                    */    unsigned char     *FB;          /* Map of frame buffer                   */    CARD32            MemCntl;    CARD32            BusCntl;    unsigned long     FbMapSize;    /* Size of frame buffer, in bytes        */    int               Flags;        /* Saved copy of mode flags              */    CARD8             BIOSDisplay;  /* Device the BIOS is set to display to  */    Bool              HasPanelRegs; /* Current chip can connect to a FP      */    CARD8             *VBIOS;       /* Video BIOS for mode validation on FPs */    int               FPBIOSstart;  /* Start of the flat panel info          */				/* Computed values for FPs */    int               PanelXRes;    int               PanelYRes;    int               HOverPlus;    int               HSyncWidth;    int               HBlank;    int               VOverPlus;    int               VSyncWidth;    int               VBlank;    int               PanelPwrDly;    R128PLLRec        pll;    R128RAMPtr        ram;    R128SaveRec       SavedReg;     /* Original (text) mode                  */    R128SaveRec       ModeReg;      /* Current mode                          */    Bool              (*CloseScreen)(int, ScreenPtr);    void              (*BlockHandler)(int, pointer, pointer, pointer);    Bool              PaletteSavedOnVT; /* Palette saved on last VT switch   */    XAAInfoRecPtr     accel;    Bool              accelOn;    xf86CursorInfoPtr cursor;    unsigned long     cursor_start;    unsigned long     cursor_end;    /*     * XAAForceTransBlit is used to change the behavior of the XAA     * SetupForScreenToScreenCopy function, to make it DGA-friendly.     */    Bool              XAAForceTransBlit;    int               fifo_slots;   /* Free slots in the FIFO (64 max)       */    int               pix24bpp;     /* Depth of pixmap for 24bpp framebuffer */    Bool              dac6bits;     /* Use 6 bit DAC?                        */				/* Computed values for Rage 128 */    int               pitch;    int               datatype;    CARD32            dp_gui_master_cntl;				/* Saved values for ScreenToScreenCopy */    int               xdir;    int               ydir;				/* ScanlineScreenToScreenColorExpand support */    unsigned char     *scratch_buffer[1];    unsigned char     *scratch_save;    int               scanline_x;    int               scanline_y;    int               scanline_w;