drmAgpRelease(info->drmFD);	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[agp] %d kB allocated with handle 0x%08x\n",	       info->gartSize*1024, info->agpMemHandle);    if (drmAgpBind(info->drmFD,		   info->agpMemHandle, info->gartOffset) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not bind\n");	drmAgpFree(info->drmFD, info->agpMemHandle);	drmAgpRelease(info->drmFD);	return FALSE;    }    if (drmAddMap(info->drmFD, info->ringStart, info->ringMapSize,		  DRM_AGP, DRM_READ_ONLY, &info->ringHandle) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[agp] Could not add ring mapping\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[agp] ring handle = 0x%08x\n", info->ringHandle);    if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize,	       &info->ring) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[agp] Ring mapped at 0x%08lx\n",	       (unsigned long)info->ring);    if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize,		  DRM_AGP, DRM_READ_ONLY, &info->ringReadPtrHandle) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[agp] Could not add ring read ptr mapping\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO, 	       "[agp] ring read ptr handle = 0x%08x\n",	       info->ringReadPtrHandle);    if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,	       &info->ringReadPtr) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[agp] Could not map ring read ptr\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[agp] Ring read ptr mapped at 0x%08lx\n",	       (unsigned long)info->ringReadPtr);    if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize,		  DRM_AGP, 0, &info->bufHandle) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[agp] Could not add vertex/indirect buffers mapping\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO, 	       "[agp] vertex/indirect buffers handle = 0x%08x\n",	       info->bufHandle);    if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize,	       &info->buf) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[agp] Could not map vertex/indirect buffers\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[agp] Vertex/indirect buffers mapped at 0x%08lx\n",	       (unsigned long)info->buf);    if (drmAddMap(info->drmFD, info->gartTexStart, info->gartTexMapSize,		  DRM_AGP, 0, &info->gartTexHandle) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[agp] Could not add GART texture map mapping\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO, 	       "[agp] GART texture map handle = 0x%08x\n",	       info->gartTexHandle);    if (drmMap(info->drmFD, info->gartTexHandle, info->gartTexMapSize,	       &info->gartTex) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[agp] Could not map GART texture map\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[agp] GART Texture map mapped at 0x%08lx\n",	       (unsigned long)info->gartTex);    RADEONSetAgpBase(info);    return TRUE;}/* Initialize the PCI GART state.  Request memory for use in PCI space, * and initialize the Radeon registers to point to that memory. */static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen){    int  ret;    int  flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL;    ret = drmScatterGatherAlloc(info->drmFD, info->gartSize*1024*1024,				&info->pciMemHandle);    if (ret < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Out of memory (%d)\n", ret);	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[pci] %d kB allocated with handle 0x%08x\n",	       info->gartSize*1024, info->pciMemHandle);    RADEONDRIInitGARTValues(info);    if (drmAddMap(info->drmFD, info->ringStart, info->ringMapSize,		  DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[pci] Could not add ring mapping\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[pci] ring handle = 0x%08x\n", info->ringHandle);    if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize,	       &info->ring) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map ring\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[pci] Ring mapped at 0x%08lx\n",	       (unsigned long)info->ring);    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[pci] Ring contents 0x%08lx\n",	       *(unsigned long *)(pointer)info->ring);    if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize,		  DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[pci] Could not add ring read ptr mapping\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO, 	       "[pci] ring read ptr handle = 0x%08x\n",	       info->ringReadPtrHandle);    if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,	       &info->ringReadPtr) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[pci] Could not map ring read ptr\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[pci] Ring read ptr mapped at 0x%08lx\n",	       (unsigned long)info->ringReadPtr);    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[pci] Ring read ptr contents 0x%08lx\n",	       *(unsigned long *)(pointer)info->ringReadPtr);    if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize,		  DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[pci] Could not add vertex/indirect buffers mapping\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO, 	       "[pci] vertex/indirect buffers handle = 0x%08x\n",	       info->bufHandle);    if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize,	       &info->buf) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[pci] Could not map vertex/indirect buffers\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[pci] Vertex/indirect buffers mapped at 0x%08lx\n",	       (unsigned long)info->buf);    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[pci] Vertex/indirect buffers contents 0x%08lx\n",	       *(unsigned long *)(pointer)info->buf);    if (drmAddMap(info->drmFD, info->gartTexStart, info->gartTexMapSize,		  DRM_SCATTER_GATHER, 0, &info->gartTexHandle) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[pci] Could not add GART texture map mapping\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO, 	       "[pci] GART texture map handle = 0x%08x\n",	       info->gartTexHandle);    if (drmMap(info->drmFD, info->gartTexHandle, info->gartTexMapSize,	       &info->gartTex) < 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[pci] Could not map GART texture map\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[pci] GART Texture map mapped at 0x%08lx\n",	       (unsigned long)info->gartTex);    return TRUE;}/* Add a map for the MMIO registers that will be accessed by any * DRI-based clients. */static Bool RADEONDRIMapInit(RADEONInfoPtr info, ScreenPtr pScreen){				/* Map registers */    info->registerSize = info->MMIOSize;    if (drmAddMap(info->drmFD, info->MMIOAddr, info->registerSize,		  DRM_REGISTERS, DRM_READ_ONLY, &info->registerHandle) < 0) {	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[drm] register handle = 0x%08x\n", info->registerHandle);    return TRUE;}/* Initialize the kernel data structures */static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen){    ScrnInfoPtr    pScrn = xf86Screens[pScreen->myNum];    int            cpp   = info->CurrentLayout.pixel_bytes;    drmRadeonInit  drmInfo;    memset(&drmInfo, 0, sizeof(drmRadeonInit));    if ( info->ChipFamily >= CHIP_FAMILY_R300 )       drmInfo.func             = DRM_RADEON_INIT_R300_CP;    else    if ( info->ChipFamily >= CHIP_FAMILY_R200 )       drmInfo.func		= DRM_RADEON_INIT_R200_CP;    else       drmInfo.func		= DRM_RADEON_INIT_CP;    drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);    drmInfo.is_pci              = (info->cardType!=CARD_AGP);    drmInfo.cp_mode             = info->CPMode;    drmInfo.gart_size           = info->gartSize*1024*1024;    drmInfo.ring_size           = info->ringSize*1024*1024;    drmInfo.usec_timeout        = info->CPusecTimeout;    drmInfo.fb_bpp              = info->CurrentLayout.pixel_code;    drmInfo.depth_bpp           = (info->depthBits - 8) * 2;    drmInfo.front_offset        = info->frontOffset;    drmInfo.front_pitch         = info->frontPitch * cpp;    drmInfo.back_offset         = info->backOffset;    drmInfo.back_pitch          = info->backPitch * cpp;    drmInfo.depth_offset        = info->depthOffset;    drmInfo.depth_pitch         = info->depthPitch * drmInfo.depth_bpp / 8;    drmInfo.fb_offset           = info->fbHandle;    drmInfo.mmio_offset         = info->registerHandle;    drmInfo.ring_offset         = info->ringHandle;    drmInfo.ring_rptr_offset    = info->ringReadPtrHandle;    drmInfo.buffers_offset      = info->bufHandle;    drmInfo.gart_textures_offset= info->gartTexHandle;    if (drmCommandWrite(info->drmFD, DRM_RADEON_CP_INIT,			&drmInfo, sizeof(drmRadeonInit)) < 0)	return FALSE;    /* DRM_RADEON_CP_INIT does an engine reset, which resets some engine     * registers back to their default values, so we need to restore     * those engine register here.     */    RADEONEngineRestore(pScrn);    return TRUE;}static void RADEONDRIGartHeapInit(RADEONInfoPtr info, ScreenPtr pScreen){    drmRadeonMemInitHeap drmHeap;    /* Start up the simple memory manager for GART space */    drmHeap.region = RADEON_MEM_REGION_GART;    drmHeap.start  = 0;    drmHeap.size   = info->gartTexMapSize;    if (drmCommandWrite(info->drmFD, DRM_RADEON_INIT_HEAP,			&drmHeap, sizeof(drmHeap))) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[drm] Failed to initialize GART heap manager\n");    } else {	xf86DrvMsg(pScreen->myNum, X_INFO,		   "[drm] Initialized kernel GART heap manager, %d\n",		   info->gartTexMapSize);    }}/* Add a map for the vertex buffers that will be accessed by any * DRI-based clients. */static Bool RADEONDRIBufInit(RADEONInfoPtr info, ScreenPtr pScreen){				/* Initialize vertex buffers */    info->bufNumBufs = drmAddBufs(info->drmFD,				  info->bufMapSize / RADEON_BUFFER_SIZE,				  RADEON_BUFFER_SIZE,				  (info->cardType!=CARD_AGP) ? DRM_SG_BUFFER : DRM_AGP_BUFFER,				  info->bufStart);    if (info->bufNumBufs <= 0) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[drm] Could not create vertex/indirect buffers list\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[drm] Added %d %d byte vertex/indirect buffers\n",	       info->bufNumBufs, RADEON_BUFFER_SIZE);    if (!(info->buffers = drmMapBufs(info->drmFD))) {	xf86DrvMsg(pScreen->myNum, X_ERROR,		   "[drm] Failed to map vertex/indirect buffers list\n");	return FALSE;    }    xf86DrvMsg(pScreen->myNum, X_INFO,	       "[drm] Mapped %d vertex/indirect buffers\n",	       info->buffers->count);    return TRUE;}static void RADEONDRIIrqInit(RADEONInfoPtr info, ScreenPtr pScreen){    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];    if (!info->irq) {	info->irq = drmGetInterruptFromBusID(	    info->drmFD,	    ((pciConfigPtr)info->PciInfo->thisCard)->busnum,	    ((pciConfigPtr)info->PciInfo->thisCard)->devnum,	    ((pciConfigPtr)info->PciInfo->thisCard)->funcnum);	if ((drmCtlInstHandler(info->drmFD, info->irq)) != 0) {	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,		       "[drm] failure adding irq handler, "		       "there is a device already using that irq\n"		       "[drm] falling back to irq-free operation\n");	    info->irq = 0;	} else {	    unsigned char *RADEONMMIO = info->MMIO;	    info->ModeReg.gen_int_cntl = INREG( RADEON_GEN_INT_CNTL );	}    }    if (info->irq)	xf86DrvMsg(pScrn->scrnIndex, X_INFO,		   "[drm] dma control initialized, using IRQ %d\n",		   info->irq);}/* Initialize the CP state, and start the CP (if used by the X server) */static void RADEONDRICPInit(ScrnInfoPtr pScrn){    RADEONInfoPtr  info = RADEONPTR(pScrn);				/* Turn on bus mastering */    info->BusCntl &= ~RADEON_BUS_MASTER_DIS;				/* Make sure the CP is on for the X server */    RADEONCP_START(pScrn, info);#ifdef USE_XAA    if (!info->useEXA)	info->dst_pitch_offset = info->frontPitchOffset;#endif}/* Get the DRM version and do some basic useability checks of DRI */Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn){    RADEONInfoPtr  info    = RADEONPTR(pScrn);    int            major, minor, patch, fd;    int		   req_minor, req_patch;    char           *busId;    /* Check that the GLX, DRI, and DRM modules have been loaded by testing     * for known symbols in each module.     */    if (!xf86LoaderCheckSymbol("GlxSetVisualConfigs")) return FALSE;    if (!xf86LoaderCheckSymbol("drmAvailable"))        return FALSE;    if (!xf86LoaderCheckSymbol("DRIQueryVersion")) {      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,		 "[dri] RADEONDRIGetVersion failed (libdri.a too old)\n"		 "[dri] Disabling DRI.\n");      return FALSE;    }    /* Check the DRI version */    DRIQueryVersion(&major, &minor, &patch);    if (major != DRIINFO_MAJOR_VERSION || minor < DRIINFO_MINOR_VERSION) {	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,		   "[dri] RADEONDRIGetVersion failed because of a version "		   "mismatch.\n"		   "[dri] libdri version is %d.%d.%d but version %d.%d.x is "		   "needed.\n"		   "[dri] Disabling DRI.\n",		   major, minor, patch,                   DRIINFO_MAJOR_VERSION, DRIINFO_MINOR_VERSION);	return FALSE;    }    /* Check the lib version */    if (xf86LoaderCheckSymbol("drmGetLibVersion"))