/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/atimach64.c,v 1.52 2003/04/23 21:51:28 tsi Exp $ *//* * Copyright 1997 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that copyright * notice and this permission notice appear in supporting documentation, and * that the name of Marc Aurele La France not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission.  Marc Aurele La France makes no representations * about the suitability of this software for any purpose.  It is provided * "as-is" without express or implied warranty. * * MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS.  IN NO * EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. *//* * Copyright 1999-2000 Precision Insight, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to * deal in the Software without restriction, including without limitation the * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. *//*  * DRI support by: *    Manuel Teira *    Leif Delgass <ldelgass@retinalburn.net> */#ifdef HAVE_CONFIG_H#include "config.h"#endif#include <string.h>#include "ati.h"#include "atibus.h"#include "atichip.h"#include "atidac.h"#include "atimach64.h"#include "atimach64accel.h"#include "atimach64io.h"#include "atirgb514.h"#ifndef DPMS_SERVER# define DPMS_SERVER#endif#include <X11/extensions/dpms.h>/* * ATIMach64PreInit -- * * This function fills in the Mach64 portion of an ATIHWRec that is common to * all video modes generated by the driver. */voidATIMach64PreInit(    ScrnInfoPtr pScreenInfo,    ATIPtr      pATI,    ATIHWPtr    pATIHW){    CARD32 bus_cntl, config_cntl;#ifndef AVOID_CPIO    if (pATI->depth <= 4)    {        pATIHW->crtc_off_pitch = SetBits(pATI->displayWidth >> 4, CRTC_PITCH);    }    else#endif /* AVOID_CPIO */    {        pATIHW->crtc_off_pitch = SetBits(pATI->displayWidth >> 3, CRTC_PITCH);    }    if ((pATI->LockData.crtc_gen_cntl & CRTC_CSYNC_EN) && !pATI->OptionCSync)    {        xf86DrvMsg(pScreenInfo->scrnIndex, X_NOTICE,            "Using composite sync to match input timing.\n");        pATI->OptionCSync = TRUE;    }    pATIHW->bus_cntl = bus_cntl = inr(BUS_CNTL);    if (pATI->Chip < ATI_CHIP_264VT4)        pATIHW->bus_cntl = (pATIHW->bus_cntl & ~BUS_HOST_ERR_INT_EN) |            BUS_HOST_ERR_INT;    if (pATI->Chip < ATI_CHIP_264VTB)    {        pATIHW->bus_cntl &= ~(BUS_FIFO_ERR_INT_EN | BUS_ROM_DIS);        pATIHW->bus_cntl |= SetBits(15, BUS_FIFO_WS) | BUS_FIFO_ERR_INT;    }    else if (pATI->MMIOInLinear)    {        pATIHW->bus_cntl &= ~BUS_APER_REG_DIS;    }    else    {        pATIHW->bus_cntl |= BUS_APER_REG_DIS;    }    if (pATI->Chip >= ATI_CHIP_264VT)        pATIHW->bus_cntl |= BUS_EXT_REG_EN;     /* Enable Block 1 */#ifdef AVOID_CPIO    pATIHW->mem_vga_wp_sel = SetBits(0, MEM_VGA_WPS0) |        SetBits(1, MEM_VGA_WPS1);    pATIHW->mem_vga_rp_sel = SetBits(0, MEM_VGA_RPS0) |        SetBits(1, MEM_VGA_RPS1);#else /* AVOID_CPIO */    pATIHW->mem_vga_wp_sel = SetBits(0, MEM_VGA_WPS0) |        SetBits(pATIHW->nPlane, MEM_VGA_WPS1);    pATIHW->mem_vga_rp_sel = SetBits(0, MEM_VGA_RPS0) |        SetBits(pATIHW->nPlane, MEM_VGA_RPS1);#endif /* AVOID_CPIO */    pATIHW->dac_cntl = inr(DAC_CNTL) &        ~(DAC1_CLK_SEL | DAC_PALETTE_ACCESS_CNTL | DAC_8BIT_EN);    if (pATI->Chip >= ATI_CHIP_264CT)        pATIHW->dac_cntl &= ~DAC_FEA_CON_EN;    if (pATI->rgbBits == 8)        pATIHW->dac_cntl |= DAC_8BIT_EN;    pATIHW->gen_test_cntl = pATI->LockData.gen_test_cntl & ~GEN_CUR_EN;    if (pATI->DAC == ATI_DAC_IBMRGB514)        pATIHW->gen_test_cntl |= GEN_OVR_OUTPUT_EN;    pATIHW->config_cntl = config_cntl = inr(CONFIG_CNTL);#ifndef AVOID_CPIO    if (pATI->UseSmallApertures)    {        pATIHW->config_cntl |= CFG_MEM_VGA_AP_EN;    }    else#endif /* AVOID_CPIO */    {        pATIHW->config_cntl &= ~CFG_MEM_VGA_AP_EN;    }    if (pATI->LinearBase && (pATI->Chip < ATI_CHIP_264CT))    {        /* Replace linear aperture size and address */        pATIHW->config_cntl &= ~(CFG_MEM_AP_LOC | CFG_MEM_AP_SIZE);        pATIHW->config_cntl |= SetBits(pATI->LinearBase >> 22, CFG_MEM_AP_LOC);        if ((pATI->Chip < ATI_CHIP_264CT) && (pATI->VideoRAM < 4096))            pATIHW->config_cntl |= SetBits(1, CFG_MEM_AP_SIZE);        else            pATIHW->config_cntl |= SetBits(2, CFG_MEM_AP_SIZE);    }    if (pATI->Chip >= ATI_CHIP_264VTB)    {        pATIHW->mem_buf_cntl = inr(MEM_BUF_CNTL) | INVALIDATE_RB_CACHE;        pATIHW->mem_cntl = (pATI->LockData.mem_cntl &            ~(CTL_MEM_LOWER_APER_ENDIAN | CTL_MEM_UPPER_APER_ENDIAN)) |            SetBits(CTL_MEM_APER_BYTE_ENDIAN, CTL_MEM_LOWER_APER_ENDIAN);        switch (pATI->bitsPerPixel)        {            default:                pATIHW->mem_cntl |= SetBits(CTL_MEM_APER_BYTE_ENDIAN,                    CTL_MEM_UPPER_APER_ENDIAN);                break;            case 16:                pATIHW->mem_cntl |= SetBits(CTL_MEM_APER_WORD_ENDIAN,                    CTL_MEM_UPPER_APER_ENDIAN);                break;            case 32:                pATIHW->mem_cntl |= SetBits(CTL_MEM_APER_LONG_ENDIAN,                    CTL_MEM_UPPER_APER_ENDIAN);                break;        }        pATIHW->mpp_config = inr(MPP_CONFIG);        pATIHW->mpp_config &=            ~(MPP_PRESCALE | MPP_NSTATES | MPP_FORMAT | MPP_WAIT_STATE |              MPP_INSERT_WAIT | MPP_TRISTATE_ADDR | MPP_AUTO_INC_EN |              MPP_CHKREQ_EN | MPP_BUFFER_SIZE | MPP_BUFFER_MODE | MPP_BUSY);        pATIHW->mpp_config |=            (MPP_NSTATES_8 | MPP_FORMAT_DA8 | SetBits(4, MPP_WAIT_STATE) |             MPP_CHKRDY_EN | MPP_READ_EARLY | MPP_RW_MODE | MPP_EN);        pATIHW->mpp_strobe_seq = inr(MPP_STROBE_SEQ);        pATIHW->mpp_strobe_seq &= ~(MPP_STB0_SEQ | MPP_STB1_SEQ);        pATIHW->mpp_strobe_seq |=            SetBits(0x0087U, MPP_STB0_SEQ) | SetBits(0x0083U, MPP_STB1_SEQ);        pATIHW->tvo_cntl = 0;    }    /* Draw engine setup */    if (pATI->Block0Base)    {        /* Ensure apertures are enabled */        outr(BUS_CNTL, pATIHW->bus_cntl);        outr(CONFIG_CNTL, pATIHW->config_cntl);        /*         * When possible, max out command FIFO size.         */        if (pATI->Chip >= ATI_CHIP_264VT4)#ifdef XF86DRI_DEVEL	    /* Changing the FIFO depth seems to interfere with DMA, so use 	     * default of 128 entries (0x01)	     */	    pATIHW->gui_cntl = (inm(GUI_CNTL) & ~CMDFIFO_SIZE_MODE) | 0x01;#else /* XF86DRI_DEVEL */            pATIHW->gui_cntl = inm(GUI_CNTL) & ~CMDFIFO_SIZE_MODE;#endif /* XF86DRI_DEVEL */        /* Initialise destination registers */        pATIHW->dst_off_pitch =            SetBits((pATI->displayWidth * pATI->XModifier) >> 3, DST_PITCH);        pATIHW->dst_cntl = DST_X_DIR | DST_Y_DIR | DST_LAST_PEL;        /* Initialise source registers */        pATIHW->src_off_pitch = pATIHW->dst_off_pitch;        pATIHW->src_width1 = pATIHW->src_height1 =            pATIHW->src_width2 = pATIHW->src_height2 = 1;        pATIHW->src_cntl = SRC_LINE_X_DIR;        /* Initialise scissor, allowing for offscreen areas */#ifdef USE_XAA        if (!pATI->useEXA)        {            int width, height, total;            pATIHW->sc_right = (pATI->displayWidth * pATI->XModifier) - 1;            width = pATI->displayWidth * pATI->bitsPerPixel;            total = pScreenInfo->videoRam * (1024 * 8);            height = (total + width - 1) / width;            if (height > ATIMach64MaxY + 1)                height = ATIMach64MaxY + 1;            pATIHW->sc_bottom = height - 1;        }#endif /* USE_XAA */#ifdef USE_EXA        if (pATI->useEXA)        {            pATIHW->sc_right = ATIMach64MaxX;            pATIHW->sc_bottom = ATIMach64MaxY;        }#endif /* USE_EXA */        pATI->sc_left_right = SetWord(pATI->NewHW.sc_right, 1) |            SetWord(pATI->NewHW.sc_left, 0);        pATI->sc_top_bottom = SetWord(pATI->NewHW.sc_bottom, 1) |            SetWord(pATI->NewHW.sc_top, 0);        /* Initialise data path */        pATIHW->dp_frgd_clr = (CARD32)(-1);        pATIHW->dp_write_mask = (CARD32)(-1);        switch (pATI->depth)        {            case 8:                pATIHW->dp_chain_mask = DP_CHAIN_8BPP;                pATIHW->dp_pix_width =                    SetBits(PIX_WIDTH_8BPP, DP_DST_PIX_WIDTH) |                    SetBits(PIX_WIDTH_8BPP, DP_SRC_PIX_WIDTH) |                    SetBits(PIX_WIDTH_1BPP, DP_HOST_PIX_WIDTH);                break;            case 15:                pATIHW->dp_chain_mask = DP_CHAIN_15BPP_1555;                pATIHW->dp_pix_width =                    SetBits(PIX_WIDTH_15BPP, DP_DST_PIX_WIDTH) |                    SetBits(PIX_WIDTH_15BPP, DP_SRC_PIX_WIDTH) |                    SetBits(PIX_WIDTH_1BPP, DP_HOST_PIX_WIDTH);                break;            case 16:                pATIHW->dp_chain_mask = DP_CHAIN_16BPP_565;                pATIHW->dp_pix_width =                    SetBits(PIX_WIDTH_16BPP, DP_DST_PIX_WIDTH) |                    SetBits(PIX_WIDTH_16BPP, DP_SRC_PIX_WIDTH) |                    SetBits(PIX_WIDTH_1BPP, DP_HOST_PIX_WIDTH);                break;            case 24:                if (pATI->bitsPerPixel == 24)                {                    pATIHW->dp_chain_mask = DP_CHAIN_24BPP_888;                    pATIHW->dp_pix_width =                        SetBits(PIX_WIDTH_8BPP, DP_DST_PIX_WIDTH) |                        SetBits(PIX_WIDTH_8BPP, DP_SRC_PIX_WIDTH) |                        SetBits(PIX_WIDTH_1BPP, DP_HOST_PIX_WIDTH);                }                else                {                    pATIHW->dp_chain_mask = DP_CHAIN_32BPP_8888;                    pATIHW->dp_pix_width =                        SetBits(PIX_WIDTH_32BPP, DP_DST_PIX_WIDTH) |                        SetBits(PIX_WIDTH_32BPP, DP_SRC_PIX_WIDTH) |                        SetBits(PIX_WIDTH_1BPP, DP_HOST_PIX_WIDTH);                }                break;            default:                break;        }#if X_BYTE_ORDER == X_LITTLE_ENDIAN        pATIHW->dp_pix_width |= DP_BYTE_PIX_ORDER;#endif /* X_BYTE_ORDER */        pATIHW->dp_mix = SetBits(MIX_SRC, DP_FRGD_MIX) |            SetBits(MIX_DST, DP_BKGD_MIX);        pATIHW->dp_src = DP_MONO_SRC_ALLONES |            SetBits(SRC_FRGD, DP_FRGD_SRC) | SetBits(SRC_BKGD, DP_BKGD_SRC);        /* Initialise colour compare */        pATIHW->clr_cmp_msk = (1 << pATI->depth) - 1;        if (pATI->Block1Base)        {            pATIHW->overlay_y_x_start = SetBits(0, OVERLAY_Y_START) |                SetBits(0, OVERLAY_X_START) | OVERLAY_LOCK_START;            pATIHW->overlay_y_x_end = SetBits(0, OVERLAY_Y_END) |                SetBits(0, OVERLAY_X_END) | OVERLAY_LOCK_END;            pATIHW->overlay_graphics_key_clr =                (3 << ((2 * pATI->depth) / 3)) |                (2 << ((1 * pATI->depth) / 3)) |                (1 << ((0 * pATI->depth) / 3));            pATIHW->overlay_graphics_key_msk = (1 << pATI->depth) - 1;            pATIHW->overlay_key_cntl =                SetBits(OVERLAY_MIX_FALSE, OVERLAY_VIDEO_FN) |                SetBits(OVERLAY_MIX_EQUAL, OVERLAY_GRAPHICS_FN);            pATIHW->overlay_scale_cntl = SCALE_EN;            pATIHW->video_format = VIDEO_IN_VYUY422 | SCALER_IN_VYUY422;            if (pATI->Chip >= ATI_CHIP_264GTPRO)            {                /* These values are documented voodoo */                pATIHW->scaler_h_coeff0 = SetByte(0x20U, 1);                pATIHW->scaler_h_coeff1 = SetByte(0x0DU, 0) |                    SetByte(0x20U, 1) | SetByte(0x06U, 2) | SetByte(0x0DU, 3);                pATIHW->scaler_h_coeff2 = SetByte(0x0DU, 0) |                    SetByte(0x1CU, 1) | SetByte(0x0AU, 2) | SetByte(0x0DU, 3);                pATIHW->scaler_h_coeff3 = SetByte(0x0CU, 0) |                    SetByte(0x1AU, 1) | SetByte(0x0EU, 2) | SetByte(0x0CU, 3);                pATIHW->scaler_h_coeff4 = SetByte(0x0CU, 0) |                    SetByte(0x14U, 1) | SetByte(0x14U, 2) | SetByte(0x0CU, 3);            }        }        /* Restore aperture enablement */        outr(BUS_CNTL, bus_cntl);        outr(CONFIG_CNTL, config_cntl);    }}/* * ATIMach64Save -- * * This function is called to save the Mach64 portion of the current video * state. */voidATIMach64Save(    ATIPtr      pATI,    ATIHWPtr    pATIHW){    pATIHW->crtc_h_total_disp = inr(CRTC_H_TOTAL_DISP);    pATIHW->crtc_h_sync_strt_wid = inr(CRTC_H_SYNC_STRT_WID);    pATIHW->crtc_v_total_disp = inr(CRTC_V_TOTAL_DISP);    pATIHW->crtc_v_sync_strt_wid = inr(CRTC_V_SYNC_STRT_WID);    pATIHW->crtc_off_pitch = inr(CRTC_OFF_PITCH);    pATIHW->crtc_gen_cntl = inr(CRTC_GEN_CNTL);    pATIHW->ovr_clr = inr(OVR_CLR);    pATIHW->ovr_wid_left_right = inr(OVR_WID_LEFT_RIGHT);    pATIHW->ovr_wid_top_bottom = inr(OVR_WID_TOP_BOTTOM);    pATIHW->cur_clr0 = inr(CUR_CLR0);    pATIHW->cur_clr1 = inr(CUR_CLR1);    pATIHW->cur_offset = inr(CUR_OFFSET);    pATIHW->cur_horz_vert_posn = inr(CUR_HORZ_VERT_POSN);    pATIHW->cur_horz_vert_off = inr(CUR_HORZ_VERT_OFF);    pATIHW->clock_cntl = inr(CLOCK_CNTL);    pATIHW->bus_cntl = inr(BUS_CNTL);    pATIHW->mem_vga_wp_sel = inr(MEM_VGA_WP_SEL);    pATIHW->mem_vga_rp_sel = inr(MEM_VGA_RP_SEL);    pATIHW->dac_cntl = inr(DAC_CNTL);    pATIHW->config_cntl = inr(CONFIG_CNTL);