;--------------------------------------------------------
; C_Compiler for ETOMS MCU
; Target MCU: ET44M210
;--------------------------------------------------------
;	.module ET21x130C_usb_lib
;--------------------------------------------------------
; publics variables in this module
;--------------------------------------------------------
;	.globl _String_index_DProduct_table
;	.globl _String_index_DManufacture_table
;	.globl _String_langid_table
;	.globl _Fc_config_desc_table
;	.globl _Fc_device_desc_table
;	.globl _Int_SofInte
;	.globl _Int_FrwpInte
;	.globl _Int_IdleInte
;	.globl _Int_Int3e
;	.globl _Int_Int2e
;	.globl _Int_Int1e
;	.globl _Int_Int0Txe
;	.globl _Int_Int0Ine
;	.globl _Int_Int0Rxe
;	.globl _Int_RstInte
;	.globl _usb_byTemp
;	.globl _nAddrBuf
;	.globl _nTable
;	.globl _nRomAdr
;	.globl _nwLength
;	.globl _nHwLength
;	.globl _psz
;	.globl _UsbIntPre
;	.globl _UsbInitial
;	.globl _HubTransmitTable
;	.globl _fTransmitTable
;	.globl _SearchChangePort
;	.globl _StageOne
;	.globl _USB_Lib_Delay
;--------------------------------------------------------
; special function registers
_KWUAIF	EQU	0x12
_KWUBIF	EQU	0x13
_RFINTF	EQU	0x30
_IAC0	EQU	0x00
_HPC	EQU	0x01
_LPC	EQU	0x02
_STTS	EQU	0x03
_STATUS	EQU	0x03
_RAMBS0	EQU	0x04
_ROMPS	EQU	0x05
_IAP0	EQU	0x06
_INDP0	EQU	0x06
_RAMBS1	EQU	0x07
_IAP1	EQU	0x08
_INDP1	EQU	0x08
_IAC1	EQU	0x09
_INDR1	EQU	0x09
_IAPADR	EQU	0x0a
_TBLPTR	EQU	0x0b
_LTBL	EQU	0x0b
_TBHPTR	EQU	0x0c
_HTBL	EQU	0x0c
_STKPTR	EQU	0x0d
_RPTC	EQU	0x0e
_PRC	EQU	0x0f
_TCC	EQU	0x10
_INTF	EQU	0x11
_KWUPAIF	EQU	0x12
_KWUPBIF	EQU	0x13
_PORTA	EQU	0x14
_PTA	EQU	0x14
_PORTB	EQU	0x15
_PTB	EQU	0x15
_PORTC	EQU	0x16
_PTC	EQU	0x16
_PORTD	EQU	0x17
_PTD	EQU	0x17
_PORTE	EQU	0x18
_PTE	EQU	0x18
_PORTF	EQU	0x19
_PTF	EQU	0x19
_LFRC	EQU	0x1a
_HFRC	EQU	0x1b
_LFRCB	EQU	0x1c
_SPIRB	EQU	0x1d
_SPIWB	EQU	0x1e
_ADDATAH	EQU	0x1f
_ADDATAL	EQU	0x20
_DT0L	EQU	0x21
_DTOH	EQU	0x22
_PRD0L	EQU	0x23
_PRD0H	EQU	0x24
_DL0L	EQU	0x25
_DL0H	EQU	0x26
_DT1L	EQU	0x27
_DT1H	EQU	0x28
_PRD1L	EQU	0x29
_PRD1H	EQU	0x2a
_DL1L	EQU	0x2b
_DL1H	EQU	0x2c
_PRIE	EQU	0x80
_INTE	EQU	0x81
_KWUAIE	EQU	0x82
_KWUBIE	EQU	0x83
_EINTED	EQU	0x84
_SPIC	EQU	0x85
_IOCA	EQU	0x86
_IOCB	EQU	0x87
_IOCC	EQU	0x88
_IOCD	EQU	0x89
_IOCE	EQU	0x8a
_IOCF	EQU	0x8b
_PUCA	EQU	0x8c
_PUCB	EQU	0x8d
_PUCC	EQU	0x8e
_PUCD	EQU	0x85
_PUCE	EQU	0x90
_PUCF	EQU	0x91
_ODCB	EQU	0x92
_TCCC	EQU	0x93
_FRCC	EQU	0x94
_WDT_CON	EQU	0x95
_ADCAIS	EQU	0x96
_ADCCR	EQU	0x97
_PWMCR	EQU	0x98
_RFINTE	EQU	0x99
_HbmRequestType	EQU	0x80	;Bank1 Source:180 
_HbRequest	EQU	0x81	;Bank1 Source:181 
_HwValueL	EQU	0x82	;Bank1 Source:182 
_HwValueH	EQU	0x83	;Bank1 Source:183 
_HwIndexL	EQU	0x84	;Bank1 Source:184 
_HwIndexH	EQU	0x85	;Bank1 Source:185 
_HwLengthL	EQU	0x86	;Bank1 Source:186 
_HwLengthH	EQU	0x87	;Bank1 Source:187 
_HTBLL	EQU	0x88	;Bank1 Source:188 
_HROMADRL	EQU	0x89	;Bank1 Source:189 
_HROMADRH	EQU	0x8a	;Bank1 Source:18a 
_A_INTERFACE	EQU	0x8b	;Bank1 Source:18b 
_TEMP_UREG	EQU	0x8c	;Bank1 Source:18c 
_PROTOCOL	EQU	0x8d	;Bank1 Source:18d 
_IDLE_TIMER	EQU	0x8e	;Bank1 Source:18e 
_USB_STATUS	EQU	0x8f	;Bank1 Source:18f 
_HUB_STATUS	EQU	0x8f	;Bank1 Source:18f 
_FC_STATUS	EQU	0x8f	;Bank1 Source:18f 
_ADDRESS_BUFh	EQU	0x90	;Bank1 Source:190 
_ADDRESS_BUFf	EQU	0x91	;Bank1 Source:191 
_CTR_BUF	EQU	0x92	;Bank1 Source:192 
_Reg_Adr	EQU	0x93	;Bank1 Source:193 
_HEP1_CNT	EQU	0x94	;Bank1 Source:194 
_STACK_IAP0	EQU	0x95	;Bank1 Source:195 
_bmRequestType	EQU	0xc0	;Bank1 Source:1c0 
_bRequest	EQU	0xc1	;Bank1 Source:1c1 
_wValueL	EQU	0xc2	;Bank1 Source:1c2 
_wValueH	EQU	0xc3	;Bank1 Source:1c3 
_wIndexL	EQU	0xc4	;Bank1 Source:1c4 
_wIndexH	EQU	0xc5	;Bank1 Source:1c5 
_wLengthL	EQU	0xc6	;Bank1 Source:1c6 
_wLengthH	EQU	0xc7	;Bank1 Source:1c7 
_TBLL	EQU	0xc8	;Bank1 Source:1c8 
_ROMADRL	EQU	0xc9	;Bank1 Source:1c9 
_ROMADRH	EQU	0xca	;Bank1 Source:1ca 
_STATUS_BUF	EQU	0xcb	;Bank1 Source:1cb 
_USBTR	EQU	0xcc	;Bank1 Source:1cc 
_GCNTR	EQU	0xcd	;Bank1 Source:1cd 
_EP1CNTR	EQU	0xce	;Bank1 Source:1ce 
_EP2CNTR	EQU	0xcf	;Bank1 Source:1cf 
_EP3CNTR	EQU	0xd0	;Bank1 Source:1d0 
_EPINTR	EQU	0xd1	;Bank1 Source:1d1 
_EPINTE	EQU	0xd2	;Bank1 Source:1d2 
_STAINTR	EQU	0xd3	;Bank1 Source:1d3 
_STAINTE	EQU	0xd4	;Bank1 Source:1d4 
_FAR	EQU	0xd5	;Bank1 Source:1d5 
_EP0RXTR	EQU	0xd6	;Bank1 Source:1d6 
_EP0RXCSR	EQU	0xd7	;Bank1 Source:1d7 
_EP0TXCSR	EQU	0xd8	;Bank1 Source:1d8 
_EP1CSR	EQU	0xd9	;Bank1 Source:1d9 
_EP2CSR	EQU	0xda	;Bank1 Source:1da 
_EP3CSR	EQU	0xdb	;Bank1 Source:1db 
_EP0RXCTR	EQU	0xdc	;Bank1 Source:1dc 
_EP0TXCTR	EQU	0xdd	;Bank1 Source:1dd 
_EP1CTR	EQU	0xde	;Bank1 Source:1de 
_EP2CTR	EQU	0xdf	;Bank1 Source:1df 
_EP3CTR	EQU	0xe0	;Bank1 Source:1e0 
_EP0RXDAR	EQU	0xe1	;Bank1 Source:1e1 
_EP0TXDAR	EQU	0xe2	;Bank1 Source:1e2 
_EP1DAR	EQU	0xe3	;Bank1 Source:1e3 
_EP2DAR	EQU	0xe4	;Bank1 Source:1e4 
_EP3DAR	EQU	0xe5	;Bank1 Source:1e5 
_HGSR	EQU	0xe6	;Bank1 Source:1e6 
_HINTR	EQU	0xe7	;Bank1 Source:1e7 
_HINTE	EQU	0xe8	;Bank1 Source:1e8 
_HAR	EQU	0xe9	;Bank1 Source:1e9 
_HEP0RXTR	EQU	0xea	;Bank1 Source:1ea 
_HEP0RXCSR	EQU	0xeb	;Bank1 Source:1eb 
_HEP0TXCSR	EQU	0xec	;Bank1 Source:1ec 
_HEP1TXCSR	EQU	0xed	;Bank1 Source:1ed 
_HEP0RXCTR	EQU	0xee	;Bank1 Source:1ee 
_HEP0TXCTR	EQU	0xef	;Bank1 Source:1ef 
_HEP0RXDAR	EQU	0xf0	;Bank1 Source:1f0 
_HEP0TXDAR	EQU	0xf1	;Bank1 Source:1f1 
_HEP1TXDAR	EQU	0xf2	;Bank1 Source:1f2 
_HPCONR	EQU	0xf3	;Bank1 Source:1f3 
_HPSTAR	EQU	0xf4	;Bank1 Source:1f4 
_HSR	EQU	0xf5	;Bank1 Source:1f5 
_HPSR1	EQU	0xf6	;Bank1 Source:1f6 
_HPSR2	EQU	0xf7	;Bank1 Source:1f7 
_HPSR3	EQU	0xf8	;Bank1 Source:1f8 
_HPSR4	EQU	0xf9	;Bank1 Source:1f9 
_HPSCR1	EQU	0xfa	;Bank1 Source:1fa 
_HPSCR2	EQU	0xfb	;Bank1 Source:1fb 
_HPSCR3	EQU	0xfc	;Bank1 Source:1fc 
_HPSCR4	EQU	0xfd	;Bank1 Source:1fd 
_FNLR	EQU	0xfe	;Bank1 Source:1fe 
_FNHR	EQU	0xff	;Bank1 Source:1ff 
;--------------------------------------------------------
;--------------------------------------------------------
; internal ram data
;	.area	DSEG    (DATA)
;	_psz
;	_psz_1
_nHwLength	EQU	0x86	;Bank1 Source:186 
_nwLength	EQU	0xc6	;Bank1 Source:1c6 
_nRomAdr	EQU	0xc9	;Bank1 Source:1c9 
_nTable	EQU	0x0b
_nAddrBuf	EQU	0x90	;Bank1 Source:190 
_usb_byTemp	EQU	0x92	;Bank1 Source:192 
;--------------------------------------------------------
; Bit registers 
; Allocated Registers 
; Direct Registers 
; Stack Register 
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
;	.area	OSEG    (OVR,DATA)
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
;	.area	ISEG    (DATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
;	.area	XSEG    (XDATA)
;--------------------------------------------------------
; interrupt vector 
;--------------------------------------------------------
;	.area	CSEG    (CODE)
ORG	0x88
	BANK	1
	NOP
	JMP	Interrupt_Vector_0x88
ENDO
ORG	0x90
	BANK	1
	NOP
	JMP	Interrupt_Vector_0x90
ENDO
ORG	0x98
	BANK	1
	NOP
	JMP	Interrupt_Vector_0x98
ENDO
ORG	0xA8
	BANK	1
	PAGE	_Int_SofInte.PAGENUM
	JBS		_HINTR,6,_Int_SofInte
	RETI
ENDO
;Interrupt vector fun table for multi interrupt!
Interrupt_Vector_0x88:
	PAGE	_Int_Int0Rxe.PAGENUM
	JBS		_EPINTR,0,_Int_Int0Rxe
	PAGE	_Int_Int0Txe.PAGENUM
	JBS		_EPINTR,1,_Int_Int0Txe
	PAGE	_Int_Int0Ine.PAGENUM
	JBS		_EPINTR,2,_Int_Int0Ine
	RETI
Interrupt_Vector_0x90:
	PAGE	_Int_Int1e.PAGENUM
	JBS		_EPINTR,3,_Int_Int1e
	PAGE	_Int_Int2e.PAGENUM
	JBS		_EPINTR,4,_Int_Int2e
	PAGE	_Int_Int3e.PAGENUM
	JBS		_EPINTR,5,_Int_Int3e
	RETI
Interrupt_Vector_0x98:
	PAGE	_Int_RstInte.PAGENUM
	JBS		_STAINTR,0,_Int_RstInte
	PAGE	_Int_IdleInte.PAGENUM
	JBS		_STAINTR,1,_Int_IdleInte
	PAGE	_Int_FrwpInte.PAGENUM
	JBS		_STAINTR,3,_Int_FrwpInte
	RETI
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
;	.area GSINIT  (CODE)
;	.area GSFINAL (CODE)
;	.area GSINIT  (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
;	.area CSEG    (CODE)
;***
;  pBlock Stats: dbName = I
;***
;entry:  _Int_RstInte:	;Function start
; 0 exit points
;Using Bank: Bank1
;functions called:
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _USB_Lib_Delay
;   _AddUsbBusResetSub
;; Starting pCode block
_Int_RstInte:	;Function start
; 0 exit points
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (123)
;  M_BS0(GCNTR);
	BS	_GCNTR,0
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (124)
;  USB_Lib_Delay();
	CALL	_USB_Lib_Delay
	MOV A,#0x00			;inline asm
	MOV _HGSR,A			;inline asm
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (139)
;  USB_Lib_Delay();
	CALL	_USB_Lib_Delay
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (142)
;  HAR = 0;
	CLR	_HAR
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (143)
;  USB_Lib_Delay();
	CALL	_USB_Lib_Delay
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (144)
;  FAR = 0;
	CLR	_FAR
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (145)
;  USB_Lib_Delay();
	CALL	_USB_Lib_Delay
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (147)
;  STAINTR = 0xFE;//#0b11111110
	MOV	A,#0xfe
	MOV	_STAINTR,A
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (148)
;  USB_Lib_Delay();
	CALL	_USB_Lib_Delay
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (150)
;  nAddrBuf = 0;
	CLR	_nAddrBuf
	CLR	_nAddrBuf + 1
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (151)
;  HEP1_CNT = 0;
	CLR	_HEP1_CNT
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (152)
;  USB_STATUS = 0;
	CLR	_USB_STATUS
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (153)
;  STATUS_BUF = 0;
	CLR	_STATUS_BUF
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (157)
;  HAR = 127;
	MOV	A,#0x7f
	MOV	_HAR,A
;#CSRC	F:\左開中\ETOM\ET21X130D攝像頭演示\C\ET21x130C_usb_lib.c (158)