/* * Intel MCH AGPGART routines. */#include <linux/module.h>#include <linux/pci.h>#include <linux/init.h>#include <linux/agp_backend.h>#include "agp.h"#define AGP_DCACHE_MEMORY	1#define AGP_PHYS_MEMORY		2static struct gatt_mask intel_i810_masks[] ={	{.mask = I810_PTE_VALID, .type = 0},	{.mask = (I810_PTE_VALID | I810_PTE_LOCAL), .type = AGP_DCACHE_MEMORY},	{.mask = I810_PTE_VALID, .type = 0}};static void intel_i810_tlbflush(struct agp_memory *mem){	return;}static void intel_i810_agp_enable(u32 mode){	return;}/* * The i810/i830 requires a physical address to program its mouse * pointer into hardware. * However the Xserver still writes to it through the agp aperture. */static struct agp_memory *alloc_agpphysmem_i8xx(size_t pg_count, int type){	struct agp_memory *new;	void *addr;	if (pg_count != 1)		return NULL;	addr = agp_bridge->driver->agp_alloc_page();	if (addr == NULL)		return NULL;	new = agp_create_memory(1);	if (new == NULL)		return NULL;	new->memory[0] = agp_bridge->driver->mask_memory(virt_to_phys(addr), type);	new->page_count = 1;	new->num_scratch_pages = 1;	new->type = AGP_PHYS_MEMORY;	new->physical = new->memory[0];	return new;}static void intel_i810_free_by_type(struct agp_memory *curr){	agp_free_key(curr->key);	if(curr->type == AGP_PHYS_MEMORY) {		agp_bridge->driver->agp_destroy_page(phys_to_virt(curr->memory[0]));		vfree(curr->memory);	}	kfree(curr);}static unsigned long intel_i810_mask_memory(unsigned long addr, int type){	/* Type checking must be done elsewhere */	return addr | agp_bridge->driver->masks[type].mask;}static struct aper_size_info_fixed intel_i830_sizes[] ={	{128, 32768, 5},	/* The 64M mode still requires a 128k gatt */	{64, 16384, 5}};static struct _intel_i830_private {	struct pci_dev *i830_dev;		/* device one */	volatile u8 __iomem *registers;	int gtt_entries;} intel_i830_private;static void intel_i830_init_gtt_entries(void){	u16 gmch_ctrl;	int gtt_entries;	u8 rdct;	int local = 0;	static const int ddt[4] = { 0, 16, 32, 64 };	pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);	if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||	    agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) {		switch (gmch_ctrl & I830_GMCH_GMS_MASK) {		case I830_GMCH_GMS_STOLEN_512:			gtt_entries = KB(512) - KB(132);			break;		case I830_GMCH_GMS_STOLEN_1024:			gtt_entries = MB(1) - KB(132);			break;		case I830_GMCH_GMS_STOLEN_8192:			gtt_entries = MB(8) - KB(132);			break;		case I830_GMCH_GMS_LOCAL:			rdct = INREG8(intel_i830_private.registers,				      I830_RDRAM_CHANNEL_TYPE);			gtt_entries = (I830_RDRAM_ND(rdct) + 1) *					MB(ddt[I830_RDRAM_DDT(rdct)]);			local = 1;			break;		default:			gtt_entries = 0;			break;		}	} else {		switch (gmch_ctrl & I830_GMCH_GMS_MASK) {		case I855_GMCH_GMS_STOLEN_1M:			gtt_entries = MB(1) - KB(132);			break;		case I855_GMCH_GMS_STOLEN_4M:			gtt_entries = MB(4) - KB(132);			break;		case I855_GMCH_GMS_STOLEN_8M:			gtt_entries = MB(8) - KB(132);			break;		case I855_GMCH_GMS_STOLEN_16M:			gtt_entries = MB(16) - KB(132);			break;		case I855_GMCH_GMS_STOLEN_32M:			gtt_entries = MB(32) - KB(132);			break;		default:			gtt_entries = 0;			break;		}	}	if (gtt_entries > 0)		printk(KERN_INFO PFX "Detected %dK %s memory.\n",		       gtt_entries / KB(1), local ? "local" : "stolen");	else		printk(KERN_INFO PFX		       "No pre-allocated video memory detected.\n");	gtt_entries /= KB(4);	intel_i830_private.gtt_entries = gtt_entries;}/* The intel i830 automatically initializes the agp aperture during POST. * Use the memory already set aside for in the GTT. */static int intel_i830_create_gatt_table(void){	int page_order;	struct aper_size_info_fixed *size;	int num_entries;	u32 temp;	size = agp_bridge->current_size;	page_order = size->page_order;	num_entries = size->num_entries;	agp_bridge->gatt_table_real = NULL;	pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);	temp &= 0xfff80000;	intel_i830_private.registers = (volatile u8 __iomem*) ioremap(temp,128 * 4096);	if (!intel_i830_private.registers)		return (-ENOMEM);	temp = INREG32(intel_i830_private.registers,I810_PGETBL_CTL) & 0xfffff000;	global_cache_flush();	/* we have to call this as early as possible after the MMIO base address is known */	intel_i830_init_gtt_entries();	agp_bridge->gatt_table = NULL;	agp_bridge->gatt_bus_addr = temp;	return(0);}/* Return the gatt table to a sane state. Use the top of stolen * memory for the GTT. */static int intel_i830_free_gatt_table(void){	return(0);}static int intel_i830_fetch_size(void){	u16 gmch_ctrl;	struct aper_size_info_fixed *values;	values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);	if (agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82830_HB &&	    agp_bridge->dev->device != PCI_DEVICE_ID_INTEL_82845G_HB) {		/* 855GM/852GM/865G has 128MB aperture size */		agp_bridge->previous_size = agp_bridge->current_size = (void *) values;		agp_bridge->aperture_size_idx = 0;		return(values[0].size);	}	pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);	if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {		agp_bridge->previous_size = agp_bridge->current_size = (void *) values;		agp_bridge->aperture_size_idx = 0;		return(values[0].size);	} else {		agp_bridge->previous_size = agp_bridge->current_size = (void *) values;		agp_bridge->aperture_size_idx = 1;		return(values[1].size);	}	return(0);}static int intel_i830_configure(void){	struct aper_size_info_fixed *current_size;	u32 temp;	u16 gmch_ctrl;	int i;	current_size = A_SIZE_FIX(agp_bridge->current_size);	pci_read_config_dword(intel_i830_private.i830_dev,I810_GMADDR,&temp);	agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);	pci_read_config_word(agp_bridge->dev,I830_GMCH_CTRL,&gmch_ctrl);	gmch_ctrl |= I830_GMCH_ENABLED;	pci_write_config_word(agp_bridge->dev,I830_GMCH_CTRL,gmch_ctrl);	OUTREG32(intel_i830_private.registers,I810_PGETBL_CTL,agp_bridge->gatt_bus_addr | I810_PGETBL_ENABLED);	global_cache_flush();	if (agp_bridge->driver->needs_scratch_page)		for (i = intel_i830_private.gtt_entries; i < current_size->num_entries; i++)			OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (i * 4),agp_bridge->scratch_page);	return (0);}static void intel_i830_cleanup(void){	iounmap((void __iomem *) intel_i830_private.registers);}static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start,				int type){	int i,j,num_entries;	void *temp;	temp = agp_bridge->current_size;	num_entries = A_SIZE_FIX(temp)->num_entries;	if (pg_start < intel_i830_private.gtt_entries) {		printk (KERN_DEBUG PFX "pg_start == 0x%.8lx,intel_i830_private.gtt_entries == 0x%.8x\n",				pg_start,intel_i830_private.gtt_entries);		printk (KERN_INFO PFX "Trying to insert into local/stolen memory\n");		return (-EINVAL);	}	if ((pg_start + mem->page_count) > num_entries)		return (-EINVAL);	/* The i830 can't check the GTT for entries since its read only,	 * depend on the caller to make the correct offset decisions.	 */	if ((type != 0 && type != AGP_PHYS_MEMORY) ||		(mem->type != 0 && mem->type != AGP_PHYS_MEMORY))		return (-EINVAL);	global_cache_flush();	for (i = 0, j = pg_start; i < mem->page_count; i++, j++)		OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (j * 4),			agp_bridge->driver->mask_memory(mem->memory[i], mem->type));	global_cache_flush();	agp_bridge->driver->tlb_flush(mem);	return(0);}static int intel_i830_remove_entries(struct agp_memory *mem,off_t pg_start,				int type){	int i;	global_cache_flush();	if (pg_start < intel_i830_private.gtt_entries) {		printk (KERN_INFO PFX "Trying to disable local/stolen memory\n");		return (-EINVAL);	}	for (i = pg_start; i < (mem->page_count + pg_start); i++)		OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (i * 4),agp_bridge->scratch_page);	global_cache_flush();	agp_bridge->driver->tlb_flush(mem);