?? sacmv40.asm
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//========================================================================================
// Progarm: Standard function definition for SACM library V40
// Writen by: Ray Cheng
//
// Lastest modified date:
// 2000/06/23: first version
// 2000/07/15: modified
// 2000/07/24: modified for sacmv25.lib
// 2001/10/03: Add more public about queue for sacmv25f.lib
// 2001/11/05: Independent Queue for A2000/S480/MS01 Manual Mode - sacmv25h.lib
// 2001/11/06: Fix volume parameter problem - sacmv25i.lib
// 2001/12/28: add F_SP_SACM_S530_Init_ by Huangsheng
// 2003/01/03: For SACMV32a.lib
// 2003/11/06: For SACMV40a.lib
//
//
// Note:
// 1. Users are advised to change the user definition only if necessary.
// Any improper change to other SACM related function may cause library malfunction.
// 2. This module is inherited Use the SACMVxx.inc,SACMVxx.h,SACMVxx.asm with sacmvxx.lib
// 3. Provide Open code for sacmVxx.lib
// 4. Please refer to spce.inc for BODY_TYPE definition.
// This setting affects the configuration of some functions in this file.
//
//========================================================================================
//
.include spce.inc
//== User definition =====================
//---<< System Clock Setting >>------------------------------
// Note: Please refer to spce.inc for BODY_TYPE definition.
// This setting affects the validity of C_SystemClock.
//-----------------------------------------------------------
//.define C_SystemClock C_Fosc_24M
.define C_SystemClock C_Fosc_49M
//-----------------------------------------------------------
//----<< Timer definition >>------------------------
.define C_Timer_Setting_8K_For_24MHz 0xF9FF
.define C_Timer_Setting_9K_For_24MHz 0xFAAA
.define C_Timer_Setting_10K_For_24MHz 0xFB33
.define C_Timer_Setting_11K_For_24MHz 0xFBA2
.define C_Timer_Setting_12K_For_24MHz 0xFBFF
.define C_Timer_Setting_16K_For_24MHz 0xFCFF
.define C_Timer_Setting_20K_For_24MHz 0xFD98
.define C_Timer_Setting_24K_For_24MHz 0xFDFF
.define C_Timer_Setting_32K_For_24MHz 0xFE80
.define C_Timer_Setting_8K_For_49MHz 0xF3FF
.define C_Timer_Setting_9K_For_49MHz 0xF555
.define C_Timer_Setting_10K_For_49MHz 0xF666
.define C_Timer_Setting_11K_For_49MHz 0xF745
.define C_Timer_Setting_12K_For_49MHz 0xF7FF
.define C_Timer_Setting_16K_For_49MHz 0xF9FF
.define C_Timer_Setting_20K_For_49MHz 0xFB33
.define C_Timer_Setting_24K_For_49MHz 0xFBFF
.define C_Timer_Setting_32K_For_49MHz 0xFCFF
//---------------------------------------------------
//---<< Timer setting >>-------------------------------------
//.define C_S200_Timer_Setting C_Timer_Setting_16K_For_24MHz
//.define C_S480_Timer_Setting C_Timer_Setting_16K_For_24MHz
//.define C_S530_Timer_Setting C_Timer_Setting_16K_For_24MHz
//.define C_A1600_Timer_Setting C_Timer_Setting_16K_For_24MHz
//.define C_MS01_Timer_Setting C_Timer_Setting_16K_For_24MHz
//.define C_DVR1600_DAC_Timer_Setting C_Timer_Setting_16K_For_24MHz
//.define C_DVR1600_ADC_Timer_Setting C_Timer_Setting_32K_For_24MHz
//.define C_S200_Timer_Setting C_Timer_Setting_16K_For_24MHz
.define C_S200_Timer_Setting C_Timer_Setting_16K_For_49MHz
.define C_S480_Timer_Setting C_Timer_Setting_16K_For_49MHz
.define C_S530_Timer_Setting C_Timer_Setting_16K_For_49MHz
.define C_A1600_Timer_Setting C_Timer_Setting_16K_For_49MHz
.define C_MS01_Timer_Setting C_Timer_Setting_16K_For_49MHz
.define C_DVR1600_DAC_Timer_Setting C_Timer_Setting_16K_For_49MHz
.define C_DVR1600_ADC_Timer_Setting C_Timer_Setting_32K_For_49MHz
//-----------------------------------------------------------
.define C_DVR1600_Timer_Setting C_DVR1600_DAC_Timer_Setting
.public F_SACM_S200_SendDAC1
.public F_SACM_S200_SendDAC2
.public F_SACM_S200_EndPlay
.public F_SACM_S200_ISR_On
.public F_SACM_S200_ISR_Off
.public F_SP_SACM_S200_Init_
.public F_SACM_S480_SendDAC1
.public F_SACM_S480_SendDAC2
.public F_SACM_S480_EndPlay
.public F_SACM_S480_ISR_On
.public F_SACM_S480_ISR_Off
.public F_SP_SACM_S480_Init_
.public F_SACM_S530_SendDAC1
.public F_SACM_S530_SendDAC2
.public F_SACM_S530_EndPlay
.public F_SACM_S530_ISR_On
.public F_SACM_S530_ISR_Off
.public F_SP_SACM_S530_Init_
.public F_SACM_A1600_SendDAC1
.public F_SACM_A1600_SendDAC2
.public F_SACM_A1600_EndPlay
.public F_SACM_A1600_ISR_On
.public F_SACM_A1600_ISR_Off
.public F_SP_SACM_A1600_Init_
.public F_SACM_MS01_SendDAC1
.public F_SACM_MS01_SendDAC2
.public F_SACM_MS01_EndPlay
.public F_SACM_MS01_ISR_On
.public F_SACM_MS01_ISR_Off
.public F_SP_SACM_MS01_Init_
.public F_SACM_DVR1600_SendDAC1
.public F_SACM_DVR1600_SendDAC2
.public F_SACM_DVR1600_EndPlay
.public F_SACM_DVR1600_ISR_On
.public F_SACM_DVR1600_ISR_Off
.public F_SACM_DVR1600_GetADC
.public F_SP_SACM_DVR1600_Init_
.PUBLIC _SP_SwitchChannel
.PUBLIC F_SP_SwitchChannel
.public _SP_SACM_DVR1600_ADC_Timer_Init_
.public F_SP_SACM_DVR1600_ADC_Timer_Init_
.public _SP_SACM_DVR1600_DAC_Timer_Init_
.public F_SP_SACM_DVR1600_DAC_Timer_Init_
.public _SP_SACM_DVR1600_ADC_TimerDiv2_Init_
.public F_SP_SACM_DVR1600_ADC_TimerDiv2_Init_
.public _SP_SACM_DVR1600_DAC_TimerDiv2_Init_
.public F_SP_SACM_DVR1600_DAC_TimerDiv2_Init_
.public _SP_RampUpDAC1
.public _SP_RampDnDAC1
.public _SP_RampUpDAC2
.public _SP_RampDnDAC2
.public F_SP_RampUpDAC1
.public F_SP_RampDnDAC1
.public F_SP_RampUpDAC2
.public F_SP_RampDnDAC2
.define C_SACM_RAMP_DELAY 80
.external R_InterruptStatus // in spce.asm
.IRAM
.public R_ADC_Channel;
.var R_ADC_Channel = 0;
.code
////////////////////////////////////////////////////////
// Function: F_SACM_XXXX_SendDAC1
// Description: send data to DAC1 from library
//
// Syntax : F_SACM_XXXX_SendDAC1
// Destory : R4
// Parameter : R4: 16-bit unsign PCM
// Return :None
////////////////////////////////////////////////////////
F_SACM_S200_SendDAC1:
F_SACM_S480_SendDAC1:
F_SACM_S530_SendDAC1:
F_SACM_A1600_SendDAC1:
F_SACM_MS01_SendDAC1:
F_SACM_DVR1600_SendDAC1:
//push R4 to [SP];
// implemented by designer and SA
[P_DAC1] = R4;
//pop R4 from [SP];
retf;
////////////////////////////////////////////////////////
// Function: F_SACM_XXXX_SendDAC2
// Description: send data to DAC from library
//
// Syntax : F_SACM_XXXX_SendDAC2
// Destory : R4
// Parameter : R4: 16-bit unsign PCM
// Return :None
////////////////////////////////////////////////////////
F_SACM_S200_SendDAC2:
F_SACM_S480_SendDAC2:
F_SACM_S530_SendDAC2:
F_SACM_A1600_SendDAC2:
F_SACM_MS01_SendDAC2:
F_SACM_DVR1600_SendDAC2:
//push R4 to [SP];
// implemented by designer and SA
[P_DAC2] = R4;
//pop R4 from [SP];
retf;
////////////////////////////////////////////////////////
// Function: F_SACM_XXXX_EndPlay
// Description: call back from kernel when bit stream
// decoding is done
//
// Syntax : F_SACM_XXXX_EndPlay
// Destory: R1
// Parameter : None
// Return : R1: 16-bit unsign PCM
////////////////////////////////////////////////////////
F_SACM_S200_EndPlay:
F_SACM_S480_EndPlay:
F_SACM_S530_EndPlay:
F_SACM_A1600_EndPlay:
F_SACM_MS01_EndPlay:
F_SACM_DVR1600_EndPlay:
push R1 to [SP];
// implemented by designer and SA
// User can also handle concatenation , Ramp down ant etc.
nop
nop
pop R1 from [SP];
retf;
////////////////////////////////////////////////////////
// Function: F_SACM_XXXX_ISR_On
// Description: call back from kernel to turn on ISR
//
//
// Syntax : F_SACM_XXXX_ISR_On
// Destory: R1
// Parameter : None
// Return : None
////////////////////////////////////////////////////////
F_SACM_S200_ISR_On:
F_SACM_S480_ISR_On:
F_SACM_S530_ISR_On:
F_SACM_A1600_ISR_On:
F_SACM_MS01_ISR_On:
F_SACM_DVR1600_ISR_On:
push R1 to [SP];
// implemented by designer and SA
R1 = C_FIQ_TMA;
R1 |= [R_InterruptStatus]
[P_INT_Ctrl] = R1;
[R_InterruptStatus] = R1; // refer to spce.asm
//FIQ ON;
pop R1 from [SP];
retf;
////////////////////////////////////////////////////////
// Function: F_SACM_XXXX_ISR_Off
// Description: call back from kernel to turn off ISR
//
//
// Syntax : F_SACM_XXXX_ISR_Off
// Destory: R1
// Parameter : None
// Return : None
////////////////////////////////////////////////////////
F_SACM_S200_ISR_Off:
F_SACM_S480_ISR_Off:
F_SACM_S530_ISR_Off:
F_SACM_MS01_ISR_Off:
F_SACM_A1600_ISR_Off:
F_SACM_DVR1600_ISR_Off:
push R1 to [SP];
// implemented by designer and SA
R1 = [R_InterruptStatus];// for SPCE500A
//R1 = [P_INT_Mask]; // for SPCE061A
R1 &= ~C_FIQ_TMA; // turn off the specified INT only
[P_INT_Ctrl] = R1;
[R_InterruptStatus] = R1; // refer to spce.asm
pop R1 from [SP];
retf;
////////////////////////////////////////////////////////
// Function: F_SP_SACM_S200_Init_
// Description: Hardware initilazation, System Clock, DAC, INT
// Called by library
// Syntax : F_SP_SACM_Init_
// Destory: R1
// Parameter : None
// Return : None
////////////////////////////////////////////////////////
F_SP_SACM_S200_Init_:
FIR_MOV OFF;
R1 = C_SystemClock; // CPU Clock setting
[P_SystemClock] = R1;
R1 = 0X0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
[P_TimerA_Ctrl] = R1;
R1= C_S200_Timer_Setting; // TimerA setting
[P_TimerA_Data] = R1;
// R1 = 0X0000; // TimerB CKC=Fosc/2 Tout:off
// [P_TimerB_Ctrl] = R1;
// R1= C_S200_Timer_Setting; // TimerB setting
// [P_TimerB_Data] = R1;
R1 = 0x00AC // Latch DAC1 by TimerA; Latch DAC2 by TimerA; MIC_IN conversion by TimerA
// R1 = 0x00CC // Latch DAC1 by TimerA; Latch DAC2 by TimerB; MIC_IN conversion by TimerA
// R1 = 0x012C // Latch DAC1 by TimerB; Latch DAC2 by TimerA; MIC_IN conversion by TimerA
// R1 = 0x014C // Latch DAC1 by TimerB; Latch DAC2 by TimerB; MIC_IN conversion by TimerA
[P_DAC_Ctrl] = R1 // b2 of P_DAC_Ctrl must be set to 1 in SPCE500A. SPCE060A doesn't use this bit
R1 = 0xffff; // no need to clear FIQ here by arthur
[P_INT_Clear] = R1;
R1 = [R_InterruptStatus] //
R1 |= C_FIQ_TMA // Enable Timer A FIQ
// R1 |= C_FIQ_TMB // Enable Timer B FIQ
[R_InterruptStatus] = R1 //
[P_INT_Ctrl] = R1 //
fiq on;
retf
////////////////////////////////////////////////////////
// Function: F_SP_SACM_S480_Init_
// Description: Hardware initilazation, System Clock, DAC, INT
// Called by library
// Syntax : F_SP_SACM_S480_Init_
// Destory: R1
// Parameter : None
// Return : None
////////////////////////////////////////////////////////
F_SP_SACM_S480_Init_:
FIR_MOV OFF;
R1 = C_SystemClock; // CPU Clock setting
[P_SystemClock] = R1;
R1 = 0X0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
[P_TimerA_Ctrl] = R1;
R1= C_S480_Timer_Setting; // TimerA setting
[P_TimerA_Data] = R1;
// R1 = 0X0000; // TimerB CKC=Fosc/2 Tout:off
// [P_TimerB_Ctrl] = R1;
// R1= C_S480_Timer_Setting; // TimerB setting
// [P_TimerB_Data] = R1;
R1 = 0x00AC // Latch DAC1 by TimerA; Latch DAC2 by TimerA; MIC_IN conversion by TimerA
// R1 = 0x00CC // Latch DAC1 by TimerA; Latch DAC2 by TimerB; MIC_IN conversion by TimerA
// R1 = 0x012C // Latch DAC1 by TimerB; Latch DAC2 by TimerA; MIC_IN conversion by TimerA
// R1 = 0x014C // Latch DAC1 by TimerB; Latch DAC2 by TimerB; MIC_IN conversion by TimerA
[P_DAC_Ctrl] = R1 // b2 of P_DAC_Ctrl must be set to 1 in SPCE500A. SPCE060A doesn't use this bit
R1 = 0xffff; // no need to clear FIQ here by arthur
[P_INT_Clear] = R1;
R1 = [R_InterruptStatus] //
R1 |= C_FIQ_TMA // Enable Timer A FIQ
// R1 |= C_FIQ_TMB // Enable Timer B FIQ
[R_InterruptStatus] = R1 //
[P_INT_Ctrl] = R1 //
fiq on;
retf
////////////////////////////////////////////////////////
// Function: F_SP_SACM_S530_Init_
// Description: Hardware initilazation, System Clock, DAC, INT
// Called by library
// Syntax : F_SP_SACM_Init_
// Destory: R1
// Parameter : None
// Return : None
////////////////////////////////////////////////////////
F_SP_SACM_S530_Init_:
FIR_MOV OFF;
R1 = C_SystemClock; // CPU Clock setting
[P_SystemClock] = R1;
R1 = 0X0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
[P_TimerA_Ctrl] = R1;
R1= C_S530_Timer_Setting; // TimerA setting
[P_TimerA_Data] = R1;
// R1 = 0X0000; // TimerB CKC=Fosc/2 Tout:off
// [P_TimerB_Ctrl] = R1;
// R1= C_S530_Timer_Setting; // TimerB setting
// [P_TimerB_Data] = R1;
R1 = 0x00AC // Latch DAC1 by TimerA; Latch DAC2 by TimerA; MIC_IN conversion by TimerA
// R1 = 0x00CC // Latch DAC1 by TimerA; Latch DAC2 by TimerB; MIC_IN conversion by TimerA
// R1 = 0x012C // Latch DAC1 by TimerB; Latch DAC2 by TimerA; MIC_IN conversion by TimerA
// R1 = 0x014C // Latch DAC1 by TimerB; Latch DAC2 by TimerB; MIC_IN conversion by TimerA
[P_DAC_Ctrl] = R1 // b2 of P_DAC_Ctrl must be set to 1 in SPCE500A. SPCE060A doesn't use this bit
R1 = 0xffff; // no need to clear FIQ here by arthur
[P_INT_Clear] = R1;
R1 = [R_InterruptStatus] //
R1 |= C_FIQ_TMA // Enable Timer A FIQ
// R1 |= C_FIQ_TMB // Enable Timer B FIQ
[R_InterruptStatus] = R1 //
[P_INT_Ctrl] = R1 //
fiq on;
retf
////////////////////////////////////////////////////////
// Function: F_SP_SACM_A1600_Init_
// Description: Hardware initilazation, System Clock, DAC, INT
// Called by library
// Syntax : F_SP_SACM_A1600_Init_
// Destory: R1
// Parameter : None
// Return : None
////////////////////////////////////////////////////////
F_SP_SACM_A1600_Init_:
FIR_MOV OFF;
R1 = C_SystemClock; // CPU Clock setting
[P_SystemClock] = R1;
R1 = 0X0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
[P_TimerA_Ctrl] = R1;
R1= C_A1600_Timer_Setting; // TimerA setting
[P_TimerA_Data] = R1;
// R1 = 0X0000; // TimerB CKC=Fosc/2 Tout:off
// [P_TimerB_Ctrl] = R1;
// R1= C_A1600_Timer_Setting; // TimerB setting
// [P_TimerB_Data] = R1;
R1 = 0x00AC // Latch DAC1 by TimerA; Latch DAC2 by TimerA; MIC_IN conversion by TimerA
// R1 = 0x00CC // Latch DAC1 by TimerA; Latch DAC2 by TimerB; MIC_IN conversion by TimerA
// R1 = 0x012C // Latch DAC1 by TimerB; Latch DAC2 by TimerA; MIC_IN conversion by TimerA
// R1 = 0x014C // Latch DAC1 by TimerB; Latch DAC2 by TimerB; MIC_IN conversion by TimerA
[P_DAC_Ctrl] = R1 // b2 of P_DAC_Ctrl must be set to 1 in SPCE500A. SPCE060A doesn't use this bit
R1 = 0xffff; // no need to clear FIQ here by arthur
[P_INT_Clear] = R1;
R1 = [R_InterruptStatus] //
R1 |= C_FIQ_TMA // Enable Timer A FIQ
// R1 |= C_FIQ_TMB // Enable Timer B FIQ
[R_InterruptStatus] = R1 //
[P_INT_Ctrl] = R1 //
fiq on;
retf
////////////////////////////////////////////////////////
// Function: F_SP_SACM_MS01_Init_
// Description: Hardware initilazation, System Clock, DAC, INT
// Called by library
// Syntax : F_SP_SACM_Init_
// Destory: R1
// Parameter : None
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