//******************************************************************************
//  MSP430-TEST44X Demo - Timer_A UART Ultra-low Power 2400 Echo, 32kHz ACLK
//
//  Description: Use timer_A CCR0 hardware output modes and SCCI data latch to
//  to implement UART function @ 2400 baud. Software does not directly read and
//  write to RX and TX pins, instead proper use of output modes and SCCI data
//  latch are demonstrated. Use of these hardware features eliminates ISR
//  latency effects as hardware insures that output and input bit latching and
//  timing are perfectly synchronised with timer_A regardless of other
//  software activity. In the Mainloop the UART function readies the UART to
//  receive one character and waits in LPM3 with all activity interrupt driven.
//  After a character has been received, the UART receive function forces exit
//  from LPM3 in the Mainloop which echo's back the received character.
//  ACLK = TACLK = LFXT1 = 32768, MCLK = SMCLK = DCO =1MHz
//  //*An external watch crystal is required on XIN XOUT for ACLK*//	
//
//                MSP430F449
//            -----------------
//        /|\|              XIN|-
//         | |                 | 32kHz
//         --|RST          XOUT|-
//           |                 |
//           |   CCI0A/TXD/P1.0|--------> TA0
//           |                 | 2400 8N1
//           |   CCI0B/RXD/P1.1|<-------- TA0
//
//  Lierda, Inc
//  February 2006.03
//  Built with IAR Embedded Workbench Version: 1.26B
//  ID：  MSP430-TEST44X
//  DATA：2005-7-12
//  REV： 2.0A
//  程序功能：該程序是用F449的內部TIMER_A 的CCR0的捕獲比較模式功能，
//            來軟件模擬實現波特率為2400的串行通訊。其中p1.1為接收，p1.0為發送
//  硬件連接：連接P1.1(P86)和 P1.0(P87)以及地到RS232串行接口。
//
//***************************************************************************************
#define RXD   0x02                      // RXD on P1.1
#define TXD   0x01                      // TXD on P1.0

//   Conditions for 2400 Baud SW UART, ACLK = 32768

#define Bitime_5  0x06                  // ~ 0.5 bit length + small adjustment
#define Bitime  0x0E                    // 427us bit length ~ 2341 baud

unsigned int RXTXData;
unsigned char BitCnt;

void TX_Byte (void);
void RX_Ready (void);

//******************************************************************************

#include <msp430x44x.h>

void main (void)
{
  WDTCTL = WDTPW + WDTHOLD;             // Stop watchdog timer
  CCTL0 = OUT;                          // TXD Idle as Mark
  TACTL = TASSEL0+MC1;                  // ACLK, continous mode
  P1SEL = TXD;                          // P1.1/TA0 for TXD function
  P1DIR = TXD;                          // TXD output on P1
  P1SEL = RXD;                          // P2.2/TA0 as RXD input
  _EINT();


// Mainloop
  for (;;)
  {
  RX_Ready();                           // UART ready to RX one Byte
  _BIS_SR(CPUOFF + GIE);                // Enter LPM3 Until character RXed
  TX_Byte();                            // TX Back RXed Byte Received
  }
}


// Function Transmits Character from RXTXData Buffer
void TX_Byte (void)
{
  BitCnt = 0xA;                         // Load Bit counter, 8data + ST/SP
  CCR0 = TAR;                           // Current state of TA counter
  CCR0 += Bitime;                       // Some time till first bit
  RXTXData |= 0x100;                    // Add mark stop bit to RXTXData
  RXTXData = RXTXData << 1;             // Add space start bit
  CCTL0 = OUTMOD0+CCIE;                 // TXD = mark = idle
  while ( CCTL0 & CCIE );               // Wait for TX completion
}


// Function Readies UART to Receive Character into RXTXData Buffer
void RX_Ready (void)
{
  BitCnt = 0x8;                         // Load Bit counter
  CCTL0 = SCS+CCIS0+OUTMOD0+CM1+CAP+CCIE;   // Sync, Neg Edge, Capture
}


// Timer A0 interrupt service routine
//interrupt[TIMERA0_VECTOR] void Timer_A (void)
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
  CCR0 += Bitime;                       // Add Offset to CCR0

// RX
  if (CCTL0 & CCIS0)                    // RX on CCI0B?
  {
    if( CCTL0 & CAP )                   // Capture mode = start bit edge
    {
    CCTL0 &= ~ CAP;                     // Switch from capture to compare mode
    CCR0 += Bitime_5;
    }
    else
    {
    RXTXData = RXTXData >> 1;
      if (CCTL0 & SCCI)                 // Get bit waiting in receive latch
      RXTXData |= 0x80;
      BitCnt --;                        // All bits RXed?
      if ( BitCnt == 0)
//>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
      {
      CCTL0 &= ~ CCIE;                  // All bits RXed, disable interrupt
      _BIC_SR_IRQ(LPM3_bits);           // Clear LPM3 bits from 0(SR)
      }
//>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
    }
  }
// TX
  else
  {
    if ( BitCnt == 0)
    CCTL0 &= ~ CCIE;                    // All bits TXed, disable interrupt
    else
    {
      CCTL0 |=  OUTMOD2;                  // TX Space
      if (RXTXData & 0x01)
      CCTL0 &= ~ OUTMOD2;                 // TX Mark
      RXTXData = RXTXData >> 1;
      BitCnt --;
    }
  }
}