/* romInit.s - template for startup/initialization module *//* Copyright 2002 Wind River Systems, Inc. *//*TODO -  Remove the template modification history and begin a new history        starting with version 01a and growing the history upward with        each revision.modification history--------------------01a,21may02,scm  written.*//*TODO - Update documentation as necessary.Fill in this file with I/O addresses and related constants for thetemplate BSP. Anything with "template" as a prefix needs to examined and re-named to id the BSP (i.e. iq80321, iq80310, etc.) NOTICEThis template is generic only for the template versions of XSCALE.  The template CPUs have XSCALE cores with other integrated elements.  Please substitute the appropriate file for this file, as needed.DESCRIPTIONThis module contains the entry code for VxWorks images that startrunning from ROM, such as 'bootrom' and 'vxWorks_rom'.The entry point, romInit(), is the first code executed on power-up.It performs the minimal setup needed to callthe generic C routine romStart() with parameter BOOT_COLD.RomInit() typically masks interrupts in the processor, sets the initialstack pointer (to STACK_ADRS which is defined in configAll.h), andreadies system memory by configuring the DRAM controller if necessary.Other hardware and device initialization is performed later in theBSP's sysHwInit() routine.A second entry point in romInit.s is called romInitWarm(). It is calledby sysToMonitor() in sysLib.c to perform a warm boot.The warm-start entry point must be written to allow a parameter onthe stack to be passed to romStart().WARNING:This code must be Position Independent Code (PIC).  This means that itshould not contain any absolute address references.  If an absolute addressmust be used, it must be relocated by the macro ROM_ADRS(x).  This macrowill convert the absolute reference to the appropriate address withinROM space no matter how the boot code was linked. (For XSCALE, ROM_ADRS doesnot work.  You must subtract _romInit and add ROM_TEXT_ADRS to eachabsolute address). (NOTE: ROM_ADRS(x) macro does not work for currentXSCALE compiler).This code should not call out to subroutines declared in other modules,specifically sysLib.o, and sysALib.o.  If an outside module is absolutelynecessary, it can be linked into the system by adding the moduleto the makefile variable BOOT_EXTRA.  If the same module is referenced byother BSP code, then that module must be added to MACH_EXTRA as well.Note that some C compilers can generate code with absolute addresses.Such code should not be called from this module.  If absolute addressescannot be avoided, then only ROM resident code can be generated from thismodule.  Compressed and uncompressed bootroms or VxWorks images will notwork if absolute addresses are not processed by the macro ROM_ADRS.WARNING:The most common mistake in BSP development is to attempt to do too muchin romInit.s.  This is not the main hardware initialization routine.Only do enough device initialization to get memory functioning.  All otherdevice setup should be done in sysLib.c, as part of sysHwInit().Unlike other RTOS systems, VxWorks does not use a single linear deviceinitialization phase.  It is common for inexperienced BSP writers to takea BSP from another RTOS, extract the assembly language hardware setupcode and try to paste it into this file.  Because VxWorks provides 3different memory configurations, compressed, uncompressed, and rom-resident,this strategy will usually not work successfully.WARNING:The second most common mistake made by BSP writers is to assume thathardware or CPU setup functions done by romInit.o do not need to berepeated in sysALib.s or sysLib.c.  A vxWorks image needs only the followingfrom a boot program: The startType code, and the boot parameters stringin memory.  Each VxWorks image will completely reset the CPU and allhardware upon startup.  The image should not rely on the boot program toinitialize any part of the system (it may assume that the memory controlleris initialized).This means that all initialization done by romInit.s must be repeated ineither sysALib.s or sysLib.c.  The only exception here could be thememory controller.  However, in most cases even that can bereinitialized without harm.Failure to follow this rule may require users to rebuild bootrom's forminor changes in configuration.  It is WRS policy that bootroms and vxWorksimages should not be linked in this manner.ERRORSTODO - Udjust to match the number of user debug hex/led displaysFatal errors occurring during early initialization are signaled bythe following error codes are defined if 2 hex displays are available:E0 - undefined instruction exceptionE1 - software interrupt exceptionE2 - prefetch abort exceptionE3 - data abort exceptionE4 - unrecognized exception (vector at 0x14)E5 - IRQ exceptionE6 - FIQ exceptionThe following will not appear unless DRAM sizing code is used.FE - no SDRAM detected/timeout on I2C interface*/#define _ASMLANGUAGE#include "vxWorks.h"#include "arch/arm/arm.h"#include "sysLib.h"#include "config.h"        .data        .globl   VAR(copyright_wind_river)        .long    VAR(copyright_wind_river)/* TODO - for inclusion, define in template.h *//*** Local defines ***/#ifdef INCLUDE_HEX_LED#ifdef SECOND_HEX_LED/* use LSB 7-segment for debug display */#define HEX_DISPLAY_MSB            template_7SEG_LED_MSB_REG#define HEX_DISPLAY_LSB            template_7SEG_LED_LSB_REG#else/* use MSB 7-segment for debug display */#define HEX_DISPLAY_LSB            template_7SEG_LED_LSB_REG#endif#endif/*** Local macros ***//* This DELAY macro consumes around 6 cycles per iteration, assuming * the instruction cache is enabled. Given a 600Mhz core clock speed, * each iteration takes 10 nanoseconds. If the core clock speed increases, * be sure to redefine the timing macros appropriately. (It shouldn't * matter if the DELAY macro generates delays that are slightly longer * than intended, but delays that are too short may cause problems.) */#define IMMED1  #1#define DELAY(cycles, reg0)          \        ldr     reg0, =cycles ;      \        subs    reg0, reg0, IMMED1 ; \        subne   pc,  pc, IMMED12 ;#define DELAY_4_CYCLES             0x1#define DELAY_16_CYCLES            0x4  /* Tmrd delay */#define DELAY_64_CYCLES            0x10 /* Trfc delay */#define DELAY_80_NSECS             0x8#define DELAY_200_USECS            0x4f00#define DELAY_2_MSECS              0x31000#define DELAY_MCU_SECS             0x1800000#define DELAY_1_SECS               0x4000000#define DELAY_2_SECS               0xc000000#ifdef INCLUDE_HEX_LED/* * Display 'value' on the hex display */#define HEX_DISPLAY_THIS(reg0, reg1, value, addr) \        ldr     reg0, =addr ;                     \        ldr     reg1, =value ;                    \        str     reg1, [reg0] ;#endif        .data        .align 4        .globl  VAR(sdata)      /* start of data */        .globl  _sdata_sdata:VAR_LABEL(sdata)        .asciz  "start of data seg"        .text        .align  4        /* externals */        .extern FUNC(romStart)  /* system initialisation routine */        .extern _romStart       /* system initialisation routine */        /* globals */        .globl  _start        .globl  FUNC(romInit)     /* start of system code */        .globl  _romInit          /* start of system code */        .globl  _vectorTable        .globl  FUNC(sysRomVecUndefInstuc)        .globl  FUNC(sysRomVecSoftwareInt)        .globl  FUNC(sysRomVecPrefetchAbort)        .globl  FUNC(sysRomVecDataAbort)        .globl  FUNC(sysRomVecUnknow)        .globl  FUNC(sysRomVecIRQ)        .globl  FUNC(sysRomVecFIQ)        .globl  FUNC(sysRomVecDefault)#ifdef INCLUDE_HEX_LED        .globl  SevenSegDisplay#endif_start:/********************************************************************************* vectorTable - vector jump tabel**//* All vectors destroys r0, r1, and r2 */	/* Register Usage:	* r0 contains the vector number but used for temp use	* r1 should contain the vector number in 7seg format	* r2 Used for temp use	*/_vectorTable:        ldr     pc, =ROM_TEXT_ADRS        B       FUNC(sysRomVecUndefInstuc)        B       FUNC(sysRomVecSoftwareInt)        B       FUNC(sysRomVecPrefetchAbort)        B       FUNC(sysRomVecDataAbort)        B       FUNC(sysRomVecUnknow)        B       FUNC(sysRomVecIRQ)        B       FUNC(sysRomVecFIQ)_ARM_FUNCTION(sysRomVecUndefInstuc)#ifdef INCLUDE_HEX_LED#ifdef SECOND_HEX_LED        mov r1, #L7SEG_E#endif        mov r0, #L7SEG_0#endif        b   FUNC(sysRomVecDefault)_ARM_FUNCTION(sysRomVecSoftwareInt)#ifdef INCLUDE_HEX_LED#ifdef SECOND_HEX_LED        mov r1, #L7SEG_E#endif        mov r0, #L7SEG_1#endif        b   FUNC(sysRomVecDefault)_ARM_FUNCTION(sysRomVecPrefetchAbort)#ifdef INCLUDE_HEX_LED#ifdef SECOND_HEX_LED        mov r1, #L7SEG_E#endif        mov r0, #L7SEG_2#endif        b   FUNC(sysRomVecDefault)_ARM_FUNCTION(sysRomVecDataAbort)#ifdef INCLUDE_HEX_LED#ifdef SECOND_HEX_LED        mov r1, #L7SEG_E#endif        mov r0, #L7SEG_3#endif        b   FUNC(sysRomVecDefault)_ARM_FUNCTION(sysRomVecUnknow)#ifdef INCLUDE_HEX_LED#ifdef SECOND_HEX_LED        mov r1, #L7SEG_E#endif        mov r0, #L7SEG_4#endif        b   FUNC(sysRomVecDefault)_ARM_FUNCTION(sysRomVecIRQ)#ifdef INCLUDE_HEX_LED#ifdef SECOND_HEX_LED        mov r1, #L7SEG_E#endif        mov r0, #L7SEG_5#endif        b   FUNC(sysRomVecDefault)_ARM_FUNCTION(sysRomVecFIQ)#ifdef INCLUDE_HEX_LED#ifdef SECOND_HEX_LED        mov r1, #L7SEG_E#endif        mov r0, #L7SEG_6#endif        b   FUNC(sysRomVecDefault)	.balign 0x100, 0x0000/*** Default Exception Handler ***//* * Doesn't do much, just displays the * exception number on the user LED, and * then goes into forever loop. *//* * Register Usage: * r0 & r1 temp use * r2 contains the vector number in 7segment format */_ARM_FUNCTION(sysRomVecDefault)#ifdef INCLUDE_HEX_LED        bl    SevenSegDisplay#endif        b     FUNC(sysRomVecDefault)/* On template, for various reasons the MMU should be enabled, always.- Caching Uint requires MMU- The portion of the cache is used as internal data RAM, and since cache unit  requires MMU, the MMU should be ON in order to access the internal data RAM.*/#ifdef _DIAB_TOOLPT_ENTRY: .macro base,x,ap,p,d,c,b,total        .if total                .if total <= 0x40                        .long ((base<<20)|(x<<12)|(ap<<10)|(p<<9)|(d<<5)|(c<<3)|(b<<2)|2)                        PT_ENTRY (base+1),x,ap,p,d,c,b,(total-1)                .else                        .if total <= 0x256                                PT_ENTRY base,x,ap,p,d,c,b,0x40                                PT_ENTRY (base+0x40),x,ap,p,d,c,b,(total-0x40)                        .else                                PT_ENTRY base,x,ap,p,d,c,b,0x256                                PT_ENTRY (base+0x256),x,ap,p,d,c,b,(total-0x256)                        .endif                .endif        .endif        .endm/* Coarse page descriptor contains 14 bits, since it is easy to manipulate * the hex values, here the addr is shifted only by 12 bits, instead of 14bits. * So make sure that bit 11 and 10 are set to correctly in  options. * Bit 11 and 10 in options should contain the 2 LSBs from the coarse page address */COARSE_ENTRY: .macro addr,options        .long ((addr<<12)|options)        .endm/* * Extended Small Page Tables */EX_ENTRY: .macro base,x,ap,c,b,total        .if total                .if total <= 0x40                        .long ((base<<12)|(x<<6)|(ap<<4)|(c<<3)|(b<<2)|3)                        EX_ENTRY (base+1),x,ap,c,b,(total-1)                .else                        .if total <= 0x256                                EX_ENTRY base,x,ap,c,b,0x40                                EX_ENTRY (base+0x40),x,ap,c,b,(total-0x40)                        .else                                EX_ENTRY base,x,ap,c,b,0x256                                EX_ENTRY (base+0x256),x,ap,c,b,(total-0x256)                        .endif                .endif        .endif        .endmINVALID_ENTRY: .macro total        .if total                .if total <= 0x40                        .long (0)                        INVALID_ENTRY (total-1)                .else                        .if total <= 0x256                                INVALID_ENTRY 0x40                                INVALID_ENTRY (total-0x40)                        .else                                INVALID_ENTRY 0x256                                INVALID_ENTRY (total-0x256)                        .endif                .endif        .endif        .endm#else /* GNU */.MACRO PT_ENTRY base,x,ap,p,d,c,b,total=0.if \total   .if \total <= 0x40      .long (\base << 20) | (\x << 12) | (\ap << 10) | (\p << 9) | (\d << 5) | (\c << 3) | (\b << 2) | 2      PT_ENTRY "(\base+1)",\x,\ap,\p,\d,\c,\b,"(\total-1)"   .else       .if \total <= 0x256           PT_ENTRY \base,\x,\ap,\p,\d,\c,\b,0x40           PT_ENTRY "(\base+0x40)",\x,\ap,\p,\d,\c,\b,"(\total-0x40)"       .else           PT_ENTRY \base,\x,\ap,\p,\d,\c,\b,0x256           PT_ENTRY "(\base+0x256)",\x,\ap,\p,\d,\c,\b,"(\total-0x256)"       .endif   .endif.endif.ENDM/* Coarse page descriptor contains 14 bits, since it is easy to manipulate * the hex values, here the addr is shifted only by 12 bits, instead of 14bits. * So make sure that bit 11 and 10 are set to correctly in  options. * Bit 11 and 10 in options should contain the 2 LSBs from the coarse page address */.MACRO COARSE_ENTRY addr=0,options=0   .long ((\addr << 12) | \options).ENDM/* * Extended Small Page Tables */.MACRO EX_ENTRY base,x,ap,c,b,total=0.if \total   .if \total <= 0x40      .long (\base << 12) | (\x << 6) | (\ap << 4) | (\c << 3) | (\b << 2) | 3      EX_ENTRY "(\base+1)",\x,\ap,\c,\b,"(\total-1)"   .else       .if \total <= 0x256           EX_ENTRY \base,\x,\ap,\c,\b,0x40           EX_ENTRY "(\base+0x40)",\x,\ap,\c,\b,"(\total-0x40)"       .else           EX_ENTRY \base,\x,\ap,\c,\b,0x256           EX_ENTRY "(\base+0x256)",\x,\ap,\c,\b,"(\total-0x256)"       .endif   .endif.endif.ENDM.MACRO INVALID_ENTRY total=0.if \total   .if \total <= 0x40       .long (0)       INVALID_ENTRY "(\total-1)"   .else       .if \total <= 0x256           INVALID_ENTRY 0x40           INVALID_ENTRY "(\total-0x40)"       .else           INVALID_ENTRY 0x256           INVALID_ENTRY "(\total-0x256)"       .endif   .endif.endif.ENDM#endif /* _DIAB_TOOL */	.balign MMU_TRANSLATION_BASE, 0x0000/********************************************************************************* TRANSLATION TABLE.** This level-one table always contains 4096 entries. Each entry is* one 4-byte word, therefore the table length is 16 kilobytes.*//* TODO - re-define according to template memory map *//*