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?? 用VHDL編的洗衣機(jī)程序
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F1L9_p3_out = !F1_s[0] & F1_s[1] & E1_count_1[5] & E1_count_1[4] & !E1_count_1[3] & E1_count_1[2];
F1L9_p4_out = !F1_s[0] & F1_s[1] & E1_count_1[5] & E1_count_1[4] & E1_count_1[3] & !E1_count_1[2];
F1L9_or_out = F1L61 # F1L9_p0_out # F1L9_p1_out # F1L9_p2_out # F1L9_p3_out # F1L9_p4_out;
F1L9 = F1L9_or_out;


--F1L01 is seg7:ie|num~8503
F1L01_p0_out = !E1_count_1[3] & !E1_count_1[1] & !E1_count_1[0] & E1_count_1[2] & !E1_count_1[5] & !E1_count_1[4];
F1L01_p1_out = !E1_count_1[3] & !E1_count_1[1] & E1_count_1[0] & E1_count_1[2] & !E1_count_1[5] & E1_count_1[4];
F1L01_p2_out = E1_count_1[3] & !E1_count_1[1] & !E1_count_1[0] & E1_count_1[2] & E1_count_1[5] & !E1_count_1[4];
F1L01_p3_out = !E1_count_1[3] & E1_count_1[1] & !E1_count_1[0] & E1_count_1[2] & E1_count_1[5] & E1_count_1[4];
F1L01_p4_out = E1_count_1[3] & E1_count_1[1] & !E1_count_1[0] & E1_count_1[2] & !E1_count_1[5] & !E1_count_1[4];
F1L01_or_out = F1L81 # F1L01_p0_out # F1L01_p1_out # F1L01_p2_out # F1L01_p3_out # F1L01_p4_out;
F1L01 = F1L01_or_out;


--F1L11 is seg7:ie|num~8509
F1L11_p0_out = !F1_s[1] & F1_s[0];
F1L11_p1_out = E1_count_1[2] & E1_count_1[3] & !E1_count_1[4] & F1_s[1] & !F1_s[0];
F1L11_p2_out = E1_count_1[3] & !E1_count_1[4] & F1_s[1] & !F1_s[0] & E1_count_1[5];
F1L11_p3_out = E1_count_1[3] & !E1_count_1[4] & F1_s[1] & !F1_s[0] & E1_count_1[1];
F1L11_p4_out = F1_s[0] & B1_model1[0] & !B1_model1[2];
F1L11_or_out = F1L91 # F1L11_p0_out # F1L11_p1_out # F1L11_p2_out # F1L11_p3_out # F1L11_p4_out;
F1L11 = F1L11_or_out;


--F1L33 is seg7:ie|process1~93
F1L33 = EXP(E1_count_1[5] & E1_count_1[4] & E1_count_1[3] & E1_count_1[2]);


--F1L43 is seg7:ie|process1~94
F1L43 = EXP(!E1_count_1[2] & !E1_count_1[1]);


--F1L53 is seg7:ie|process1~95
F1L53 = EXP(E1_count_1[3] & E1_count_1[2]);


--F1L52 is seg7:ie|process1~59
F1L52_p0_out = F1_s[1] & !F1_s[0] & E1_count_1[5] & F1L53;
F1L52_p1_out = !F1_s[1] & F1_s[0] & E1_count_1[5] & !E1_count_1[4] & E1_count_1[1] & !E1_count_1[3] & !E1_count_1[2];
F1L52_p2_out = F1_s[1] & !F1_s[0] & !E1_count_1[5] & E1_count_1[1] & E1_count_1[3] & E1_count_1[2];
F1L52_p3_out = !F1_s[1] & F1_s[0] & F1L33 & E1_count_1[0];
F1L52_p4_out = F1_s[1] & !F1_s[0] & !E1_count_1[4] & E1_count_1[3] & F1L43;
F1L52_or_out = F1L24 # F1L52_p0_out # F1L52_p1_out # F1L52_p2_out # F1L52_p3_out # F1L52_p4_out;
F1L52 = F1L52_or_out;


--F1L72 is seg7:ie|process1~61
F1L72_p0_out = F1_s[1] & !F1_s[0] & !E1_count_1[2] & !E1_count_1[5] & E1_count_1[4] & E1_count_1[3];
F1L72_p1_out = !F1_s[1] & F1_s[0] & !E1_count_1[0] & !E1_count_1[1] & E1_count_1[2] & !E1_count_1[5] & !E1_count_1[4] & E1_count_1[3];
F1L72_p2_out = !F1_s[1] & F1_s[0] & !E1_count_1[0] & E1_count_1[1] & !E1_count_1[2] & E1_count_1[5] & !E1_count_1[4] & E1_count_1[3];
F1L72_p3_out = F1_s[1] & !F1_s[0] & !E1_count_1[1] & !E1_count_1[5] & E1_count_1[4] & E1_count_1[3];
F1L72_p4_out = F1_s[1] & !F1_s[0] & E1_count_1[2] & !E1_count_1[5] & E1_count_1[4] & !E1_count_1[3];
F1L72_or_out = F1L44 # F1L72_p0_out # F1L72_p1_out # F1L72_p2_out # F1L72_p3_out # F1L72_p4_out;
F1L72 = F1L72_or_out;


--F1L63 is seg7:ie|process1~130
F1L63 = EXP(F1_s[1] & E1_count_1[5] & !F1_s[0] & !E1_count_1[4] & !E1_count_1[3]);


--F1L73 is seg7:ie|process1~131
F1L73 = EXP(F1_s[1] & !E1_count_1[5] & !F1_s[0] & E1_count_1[3] & E1_count_1[2]);


--F1L42 is seg7:ie|process1~58
F1L42_p1_out = F1L63 & F1L73;
F1L42_p0_out = F1L63 & F1L73 & !F1_s[1] & !F1_s[0] & B1_model1[1] & B1_model1[0] & !B1_model1[2];
F1L42_p2_out = F1L63 & F1L73 & !F1_s[1] & E1_count_1[5] & F1_s[0] & !E1_count_1[3] & E1_count_1[2] & !E1_count_1[1] & E1_count_1[0];
F1L42_p3_out = F1L63 & F1L73 & !F1_s[1] & !E1_count_1[5] & F1_s[0] & E1_count_1[3] & E1_count_1[1] & E1_count_1[0] & E1_count_1[4];
F1L42_p4_out = F1L63 & F1L73 & !F1_s[1] & !E1_count_1[5] & F1_s[0] & !E1_count_1[3] & E1_count_1[2] & E1_count_1[1] & E1_count_1[0];
F1L42_or_out = F1L74 # F1L42_p0_out # F1L42_p2_out # F1L42_p3_out # F1L42_p4_out;
F1L42 = F1L42_p1_out $ F1L42_or_out;


--F1L21 is seg7:ie|num~8515
F1L21_p0_out = F1_s[0] & !F1_s[1] & E1_count_1[2] & !E1_count_1[1] & !E1_count_1[5] & !E1_count_1[4];
F1L21_p1_out = E1_count_1[3] & F1_s[0] & !F1_s[1] & !E1_count_1[2] & E1_count_1[1] & E1_count_1[5];
F1L21_p2_out = !E1_count_1[3] & F1_s[0] & !F1_s[1] & E1_count_1[2] & E1_count_1[1] & E1_count_1[4];
F1L21_p3_out = !E1_count_1[3] & F1_s[0] & !F1_s[1] & !E1_count_1[1] & E1_count_1[5] & E1_count_1[4];
F1L21_p4_out = E1_count_1[3] & F1_s[0] & !F1_s[1] & !E1_count_1[1] & !E1_count_1[5];
F1L21_or_out = F1L12 # F1L21_p0_out # F1L21_p1_out # F1L21_p2_out # F1L21_p3_out # F1L21_p4_out;
F1L21 = F1L21_or_out;


--F1L31 is seg7:ie|num~8521
F1L31_p0_out = F1_s[1] & F1_s[0] & !B1_model1[0] & !B1_model1[1];
F1L31_p1_out = F1_s[1] & !F1_s[0] & E1_count_1[5] & !E1_count_1[2];
F1L31_p2_out = F1_s[1] & !F1_s[0] & E1_count_1[2] & E1_count_1[4] & !E1_count_1[3];
F1L31_p3_out = F1_s[1] & !F1_s[0] & !E1_count_1[5] & E1_count_1[4] & E1_count_1[3];
F1L31_p4_out = F1_s[1] & F1_s[0] & !B1_model1[2] & B1_model1[0];
F1L31_or_out = F1L22 # F1L31_p0_out # F1L31_p1_out # F1L31_p2_out # F1L31_p3_out # F1L31_p4_out;
F1L31 = F1L31_or_out;


--F1L5 is seg7:ie|num[4]~8524
F1L5_p1_out = !F1L52 & power;
F1L5_p2_out = !power & F1L5;
F1L5_p3_out = !F1L52 & F1L5;
F1L5_or_out = F1L5_p1_out # F1L5_p2_out # F1L5_p3_out;
F1L5 = F1L5_or_out;


--F1L83 is seg7:ie|process1~141
F1L83 = EXP(!E1_count_1[2] & !E1_count_1[1] & !E1_count_1[5]);


--F1L93 is seg7:ie|process1~142
F1L93 = EXP(E1_count_1[2] & !E1_count_1[4]);


--F1L04 is seg7:ie|process1~143
F1L04 = EXP(E1_count_1[1] & E1_count_1[5]);


--F1L62 is seg7:ie|process1~60
F1L62_p0_out = F1_s[0] & !F1_s[1] & !E1_count_1[3] & F1L93 & !E1_count_1[5] & !E1_count_1[1] & E1_count_1[0];
F1L62_p1_out = F1_s[0] & F1_s[1] & !B1_model1[1] & !B1_model1[0] & !B1_model1[2];
F1L62_p2_out = !F1_s[0] & F1_s[1] & F1L83 & E1_count_1[3] & !E1_count_1[4];
F1L62_p3_out = F1_s[0] & !F1_s[1] & E1_count_1[3] & F1L93 & !E1_count_1[5] & E1_count_1[1] & E1_count_1[0];
F1L62_p4_out = !F1_s[0] & F1_s[1] & !E1_count_1[3] & E1_count_1[4] & F1L04 & !E1_count_1[2];
F1L62_or_out = F1L05 # F1L62_p0_out # F1L62_p1_out # F1L62_p2_out # F1L62_p3_out # F1L62_p4_out;
F1L62 = F1L62_or_out;


--F1L3 is seg7:ie|num[2]~8528
F1L3_p1_out = !F1L72 & power;
F1L3_p2_out = !power & F1L3;
F1L3_p3_out = !F1L72 & F1L3;
F1L3_or_out = F1L3_p1_out # F1L3_p2_out # F1L3_p3_out;
F1L3 = F1L3_or_out;


--F1L2 is seg7:ie|num[1]~8532
F1L2_p1_out = power & F1L82;
F1L2_p2_out = !power & F1L2;
F1L2_p3_out = F1L2 & F1L82;
F1L2_or_out = F1L2_p1_out # F1L2_p2_out # F1L2_p3_out;
F1L2 = F1L2_or_out;


--F1L1 is seg7:ie|num[0]~8536
F1L1_p1_out = power & F1L92;
F1L1_p2_out = !power & F1L1;
F1L1_p3_out = F1L1 & F1L92;
F1L1_or_out = F1L1_p1_out # F1L1_p2_out # F1L1_p3_out;
F1L1 = F1L1_or_out;


--F1L6 is seg7:ie|num[5]~8540
F1L6_p1_out = F1L42 & power;
F1L6_p2_out = !power & F1L6;
F1L6_p3_out = F1L42 & F1L6;
F1L6_or_out = F1L6_p1_out # F1L6_p2_out # F1L6_p3_out;
F1L6 = F1L6_or_out;


--F1L4 is seg7:ie|num[3]~8544
F1L4_p1_out = !F1L62 & power;
F1L4_p2_out = !power & F1L4;
F1L4_p3_out = !F1L62 & F1L4;
F1L4_or_out = F1L4_p1_out # F1L4_p2_out # F1L4_p3_out;
F1L4 = F1L4_or_out;


--F1L7 is seg7:ie|num[6]~8548
F1L7_p1_out = power & F1L32;
F1L7_p2_out = !power & F1L7;
F1L7_p3_out = F1L7 & F1L32;
F1L7_or_out = F1L7_p1_out # F1L7_p2_out # F1L7_p3_out;
F1L7 = F1L7_or_out;


--C1L4 is washer_statement:ib|present_state~792
C1L4_p1_out = C1L2Q & C1L1Q;
C1L4_p2_out = !C1L2Q & B1_model1[1] & !B1_model1[2] & !B1_model1[0];
C1L4 = C1L4_p1_out # C1L4_p2_out;


--C1L5 is washer_statement:ib|present_state~795
C1L5_p1_out = !C1L2Q & !B1_model1[2] & !C1L3Q & B1_model1[0];
C1L5 = C1L5_p1_out;


--E1L6 is counter:id|count_1[3]~803
E1L6_p1_out = E1_count_1[5] & !E1_count_1[2] & !E1_count_1[1] & !E1_count_1[0] & !E1_set0 & !C1L01;
E1L6_p2_out = !E1_count_1[2] & !E1_count_1[1] & !E1_count_1[0] & !E1_set0 & !C1L01 & E1_count_1[4];
E1L6_p3_out = E1_set0 & !C1L01 & C1L3Q & !E1_count_1[3];
E1L6 = E1L6_p1_out # E1L6_p2_out # E1L6_p3_out;


--E1L8 is counter:id|count_1[4]~807
E1L8_p1_out = E1_count_1[5] & !E1_count_1[3] & !E1_count_1[2] & !E1_count_1[1] & !E1_count_1[0] & !E1_set0 & !C1L01;
E1L8_p2_out = E1_set0 & !C1L01 & C1L3Q & !E1_count_1[4];
E1L8 = E1L8_p1_out # E1L8_p2_out;


--F1L41 is seg7:ie|num~8550
F1L41_p1_out = E1_count_1[3] & E1_count_1[2] & !E1_count_1[4] & !E1_count_1[0] & E1_count_1[5] & E1_count_1[1];
F1L41_p2_out = !E1_count_1[3] & E1_count_1[2] & !E1_count_1[4] & !E1_count_1[0] & !E1_count_1[5] & E1_count_1[1];
F1L41_p3_out = E1_count_1[3] & E1_count_1[2] & !E1_count_1[4] & E1_count_1[0] & !E1_count_1[5] & E1_count_1[1];
F1L41_p4_out = !E1_count_1[3] & E1_count_1[2] & !E1_count_1[4] & !E1_count_1[0] & E1_count_1[5] & !E1_count_1[1];
F1L41 = F1L41_p1_out # F1L41_p2_out # F1L41_p3_out # F1L41_p4_out;


--F1L51 is seg7:ie|num~8555
F1L51_p1_out = E1_count_1[3] & E1_count_1[2] & !E1_count_1[4] & E1_count_1[0] & E1_count_1[5] & !E1_count_1[1];
F1L51_p2_out = !E1_count_1[3] & E1_count_1[2] & !E1_count_1[4] & E1_count_1[0] & !E1_count_1[5] & !E1_count_1[1];
F1L51_p3_out = !E1_count_1[3] & E1_count_1[2] & E1_count_1[4] & E1_count_1[0] & E1_count_1[5] & E1_count_1[1];
F1L51_p4_out = !E1_count_1[3] & !E1_count_1[2] & !E1_count_1[4] & E1_count_1[0] & E1_count_1[5] & E1_count_1[1];
F1L51 = F1L41 # !F1_s[0] # F1L51_p1_out # F1L51_p2_out # F1L51_p3_out # F1L51_p4_out;


--F1L61 is seg7:ie|num~8561
F1L61_p0_out = B1_model1[2] & !B1_model1[1] & !B1_model1[0] & !F1_s[1];
F1L61_p1_out = !B1_model1[2] & B1_model1[1] & !B1_model1[0] & !F1_s[1];
F1L61_p2_out = !B1_model1[2] & B1_model1[1] & !B1_model1[0] & F1_s[0];
F1L61_p3_out = !B1_model1[2] & !B1_model1[1] & B1_model1[0] & !F1_s[1];
F1L61_p4_out = !B1_model1[2] & !B1_model1[1] & B1_model1[0] & F1_s[0];
F1L61 = F1L61_p0_out # F1L61_p1_out # F1L61_p2_out # F1L61_p3_out # F1L61_p4_out;


--F1L71 is seg7:ie|num~8567
F1L71_p3_out = E1_count_1[3] & !E1_count_1[1] & !E1_count_1[0] & !E1_count_1[2] & !E1_count_1[5] & E1_count_1[4];
F1L71_p4_out = !E1_count_1[3] & E1_count_1[1] & !E1_count_1[0] & !E1_count_1[2] & E1_count_1[5] & !E1_count_1[4];
F1L71 = !F1_s[0] # F1_s[1] # F1L71_p3_out # F1L71_p4_out;


--F1L81 is seg7:ie|num~8572
F1L81_p0_out = E1_count_1[3] & E1_count_1[1] & E1_count_1[0] & E1_count_1[2] & !E1_count_1[5] & E1_count_1[4];
F1L81_p1_out = E1_count_1[3] & !E1_count_1[1] & E1_count_1[0] & !E1_count_1[2] & E1_count_1[5] & !E1_count_1[4];
F1L81_p2_out = !E1_count_1[3] & E1_count_1[1] & E1_count_1[0] & !E1_count_1[2] & E1_count_1[5] & E1_count_1[4];
F1L81_p3_out = E1_count_1[3] & E1_count_1[1] & E1_count_1[0] & !E1_count_1[2] & !E1_count_1[5] & !E1_count_1[4];
F1L81_p4_out = !E1_count_1[3] & !E1_count_1[1] & E1_count_1[0] & !E1_count_1[2] & !E1_count_1[5] & !E1_count_1[4];
F1L81 = F1L71 # F1L81_p0_out # F1L81_p1_out # F1L81_p2_out # F1L81_p3_out # F1L81_p4_out;


--F1L91 is seg7:ie|num~8578
F1L91_p1_out = B1_model1[0] & !B1_model1[2] & !F1_s[1];
F1L91_p2_out = F1_s[1] & !E1_count_1[2] & !E1_count_1[5] & !E1_count_1[3] & E1_count_1[4] & !F1_s[0];
F1L91_p3_out = F1_s[1] & !E1_count_1[2] & !E1_count_1[3] & E1_count_1[4] & !F1_s[0] & !E1_count_1[1];
F1L91 = F1L91_p1_out # F1L91_p2_out # F1L91_p3_out;


--F1L14 is seg7:ie|process1~170
F1L14_p1_out = !F1_s[1] & F1_s[0] & !E1_count_1[5] & E1_count_1[4] & !E1_count_1[1] & E1_count_1[3] & !E1_count_1[2];
F1L14 = F1L14_p1_out;


--F1L24 is seg7:ie|process1~172
F1L24_p0_out = F1_s[1] & !F1_s[0] & E1_count_1[4] & !E1_count_1[3] & !E1_count_1[2];
F1L24_p1_out = !F1_s[1] & F1_s[0] & !E1_count_1[5] & !E1_count_1[4] & E1_count_1[1] & E1_count_1[3] & E1_count_1[2];
F1L24_p2_out = !F1_s[1] & F1_s[0] & E1_count_1[5] & !E1_count_1[4] & !E1_count_1[1] & E1_count_1[3] & E1_count_1[2];
F1L24_p3_out = !F1_s[1] & F1_s[0] & !E1_count_1[5] & !E1_count_1[4] & !E1_count_1[1] & !E1_count_1[3] & E1_count_1[2];
F1L24_p4_out = !F1_s[1] & F1_s[0] & E1_count_1[5] & E1_count_1[4] & E1_count_1[1] & !E1_count_1[3] & E1_count_1[2];
F1L24 = F1L14 # F1L24_p0_out # F1L24_p1_out # F1L24_p2_out # F1L24_p3_out # F1L24_p4_out;


--F1L34 is seg7:ie|process1~178
F1L34_p1_out = !B1_model1[0] & !B1_model1[1] & B1_model1[2] & F1_s[1] & F1_s[0];
F1L34_p2_out = !B1_model1[0] & !B1_model1[1] & B1_model1[2] & !F1_s[1] & !F1_s[0];
F1L34_p3_out = !B1_model1[0] & B1_model1[1] & !B1_model1[2] & F1_s[1] & F1_s[0];
F1L34 = F1L34_p1_out # F1L34_p2_out # F1L34_p3_out;


--F1L44 is seg7:ie|process1~182
F1L44_p0_out = !F1_s[1] & F1_s[0] & !E1_count_1[0] & E1_count_1[1] & E1_count_1[2] & !E1_count_1[5] & E1_count_1[4] & !E1_count_1[3];
F1L44_p1_out = !B1_model1[0] & B1_model1[1] & !B1_model1[2] & !F1_s[1] & !F1_s[0];
F1L44_p2_out = !F1_s[1] & F1_s[0] & !E1_count_1[0] & E1_count_1[1] & !E1_count_1[2] & !E1_count_1[5] & !E1_count_1[4] & !E1_count_1[3];
F1L44_p3_out = !F1_s[1] & F1_s[0] & !E1_count_1[0] & !E1_count_1[1] & !E1_count_1[2] & E1_count_1[5] & !E1_count_1[4] & !E1_count_1[3];
F1L44_p4_out = !F1_s[1] & F1_s[0] & !E1_count_1[0] & !E1_count_1[1] & E1_count_1[2] & E1_count_1[5] & E1_count_1[4] & !E1_count_1[3];
F1L44 = F1L34 # F1L44_p0_out # F1L44_p1_out # F1L44_p2_out # F1L44_p3_out # F1L44_p4_out;


--F1L54 is seg7:ie|process1~223
F1L54_p0_out = F1L63 & F1L73 & !F1_s[1] & E1_count_1[5] & F1_s[0] & E1_count_1[3] & E1_count_1[1] & !E1_count_1[4] & !E1_count_1[2];
F1L54_p1_out = F1L63 & F1L73 & F1_s[1] & !E1_count_1[5] & !F1_s[0] & E1_count_1[3] & E1_count_1[1];
F1L54_p2_out = F1L63 & F1L73 & F1_s[1] & !E1_count_1[5] & !F1_s[0] & E1_count_1[4];
F1L54_p3_out = F1L63 & F1L73 & F1_s[1] & F1_s[0] & B1_model1[1] & B1_model1[0] & !B1_model1[2];
F1L54_p4_out = F1L63 & F1L73 & !F1_s[1] & !E1_count_1[5] & F1_s[0] & E1_count_1[3] & E1_count_1[1] & !E1_count_1[2] & E1_count_1[0];
F1L54 = F1L54_p0_out # F1L54_p1_out # F1L54_p2_out # F1L54_p3_out # F1L54_p4_out;


--F1L64 is seg7:ie|process1~229
F1L64_p0_out = F1L63 & F1L73 & !F1_s[1] & E1_count_1[5] & F1_s[0] & !E1_count_1[4] & !E1_count_1[3] & !E1_count_1[1] & !E1_count_1[2];
F1L64_p1_out = F1L63 & F1L73 & !F1_s[1] & E1_count_1[5] & F1_s[0] & !E1_count_1[4] & E1_count_1[3] & E1_count_1[1] & E1_count_1[0];
F1L64_p2_out = F1L63 & F1L73 & !F1_s[1] & !E1_count_1[5] & F1_s[0] & !E1_count_1[4] & E1_count_1[3] & !E1_count_1[1] & E1_count_1[2];
F1L64_p3_out = F1L63 & F1L73 & !F1_s[1] & E1_count_1[5] & F1_s[0] & E1_count_1[3] & !E1_count_1[1] & E1_count_1[0] & !E1_count_1[2];
F1L64_p4_out = F1L63 & F1L73 & !F1_s[1] & !E1_count_1[5] & F1_s[0] & !E1_count_1[3] & !E1_count_1[1] & E1_count_1[0] & !E1_count_1[2];
F1L64 = F1L54 # F1L64_p0_out # F1L64_p1_out # F1L64_p2_out # F1L64_p3_out # F1L64_p4_out;


--F1L74 is seg7:ie|process1~235
F1L74_p0_out = F1L63 & F1L73 & !F1_s[1] & E1_count_1[5] & F1_s[0] & E1_count_1[4] & !E1_count_1[3] & E1_count_1[2] & !E1_count_1[1];
F1L74_p1_out = F1L63 & F1L73 & !F1_s[1] & E1_count_1[5] & F1_s[0] & E1_count_1[4] & !E1_count_1[3] & !E1_count_1[2] & E1_count_1[1] & E1_count_1[0];
F1L74_p2_out = F1L63 & F1L73 & !F1_s[1] & !E1_count_1[5] & F1_s[0] & !E1_count_1[4] & !E1_count_1[3] & !E1_count_1[2] & E1_count_1[1];
F1L74_p3_out = F1L63 & F1L73 & !F1_s[1] & !E1_count_1[5] & F1_s[0] & E1_count_1[4] & !E1_count_1[3] & E1_count_1[2] & E1_count_1[1];
F1L74_p4_out = F1L63 & F1L73 & !F1_s[1] & !E1_count_1[5] & F1_s[0] & E1_count_1[4] & !E1_count_1[3] & E1_count_1[2] & E1_count_1[0];

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