//// File: head_dm270.S//// (Derived from head-arm-atmel.S and Boot.asm)//// Contains the necessary h/w setup specific to the TI DM270 EVM board.//// Copyright (C) 2002 RidgeRun, Inc.// Author: RidgeRun, Inc  <skranz@ridgerun.com>//  - Derived from head_dsc21.S, 9/6/02, Gregory Nutt//  - Derived from head_dsc25.S, 2/19/03, Gregory Nutt////  This program is free software; you can redistribute  it and/or modify it//  under  the terms of  the GNU General  Public License as published by the//  Free Software Foundation;  either version 2 of the  License, or (at your//  option) any later version.////  THIS  SOFTWARE  IS  PROVIDED  ``AS  IS''  AND   ANY  EXPRESS  OR IMPLIED//  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF//  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN//  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT//  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF//  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON//  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF//  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.////  You should have received a copy of the  GNU General Public License along//  with this program; if not, write  to the Free Software Foundation, Inc.,//  675 Mass Ave, Cambridge, MA 02139, USA.//// Please report all bugs/problems to the author or <support@dsplinux.net>//// key: RRGPLCR (do not remove)//	.text        .align        .global _start#define I_BIT        0x80#define F_BIT        0x40#define ARM_MODE_SVC 0x13        _start:        // Turn off IRQ/FIQ and put into service mode.        mov r0, #(ARM_MODE_SVC | I_BIT | F_BIT)        msr cpsr, r0              // Initialize the board's clocks.        bl clock_ini        // A little something for the onboard flash.        bl flash              // Initialize board's SDRAM controller (64MB).        bl sdram_ini        // Setup Relocation register.        ldr r10, =0x00000000                // Setup Stack//        ldr sp, =0x00004ff0         ldr sp, =0x08000        mov fp, #0        b   bootstrap        // **********************// Macro regw(add,data)// **********************        .macro regw, reg_add, reg_data        ldr r0, \reg_add        ldr r1, \reg_data        strh r1, [r0]               .endm// **************************************// Setup on-board flash.// **************************************flash:                  regw EMIF_CS0CTRL1, CS0CTRL1_DATA        regw EMIF_CS0CTRL2, CS0CTRL2_DATA        mov  pc, lr                // **************************************// CLOCK controller initialize// **************************************clock_ini:        regw    CLKC_PLLA, PLLAOUT_DATA        regw    CLKC_PLLB, PLLBOUT_DATA        regw    CLKC_CLKC, CLOCKC_DATA         regw    CLKC_DIV, DIV_DATA        regw    CLKC_SEL, SEL_DATA        regw    CLOCKC_MOD1, MOD1_DATA        regw    CLOCKC_MOD2, MOD2_DATA        regw    CLOCKC_MOD3, MOD3_DATA        mov  pc, lrEMIF_CS0CTRL1:    .word 0x30A00CS0CTRL1_DATA:   .word 0xAAEFEMIF_CS0CTRL2:    .word 0x30A02CS0CTRL2_DATA:   .word 0x7221CLKC_PLLA    :    .word 0x30880CLKC_PLLB    :    .word 0x30882CLKC_CLKC    :      .word 0x30884CLKC_SEL     :       .word 0x30886CLKC_DIV     :      .word 0x30888CLOCKC_MOD1:      .word 0x30890CLOCKC_MOD2:      .word 0x30892CLOCKC_MOD3:      .word 0x30894//CLOCKC_DATA:      .word  0x4280//PLLAOUT_DATA:      .word 0x00E1//PLLBOUT_DATA:     .word 0x00C1 //add 2.20CLOCKC_DATA:      .word  0x4200PLLAOUT_DATA:      .word 0x80E1PLLBOUT_DATA:     .word 0x80C1  SEL_DATA   :       .word 0x1011 DIV_DATA   :       .word 0x0111  MOD1_DATA:        .word 0x07FFMOD2_DATA:        .word 0x01FFMOD3_DATA:        .word 0x3FFF// **********************************************************// Note: These values should stay in sync with linux/kernel.h// **********************************************************L_STACK_MAGIC:           .long 0xdeadbeefL_STACK_UNTOUCHED_MAGIC: .long 0xfeef1ef0