/* * File: cs8900.c * * This is an implementation of a ether.h interface. This implementation * supplies an ethernet driver particular to the CS8900 series ethernet chip * set. This h/w dependent implemenation exposes the h/w independent ether.h * interface. *  * Implemented with assitance from the Cirrus Logic CS8900A h/w data sheet. * * See Also *   ether.h * * Copyright (C) 2002 RidgeRun, Inc. * Author: RidgeRun, Inc  <skranz@ridgerun.com> * *  This program is free software; you can redistribute  it and/or modify it *  under  the terms of  the GNU General  Public License as published by the *  Free Software Foundation;  either version 2 of the  License, or (at your *  option) any later version. * *  THIS  SOFTWARE  IS  PROVIDED  ``AS  IS''  AND   ANY  EXPRESS  OR IMPLIED *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT, *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * *  You should have received a copy of the  GNU General Public License along *  with this program; if not, write  to the Free Software Foundation, Inc., *  675 Mass Ave, Cambridge, MA 02139, USA. * * Please report all bugs/problems to the author or <support@dsplinux.net> * * key: RRGPLCR (do not remove) * */#include "memconfig.h"#include "types.h"#include "util.h"#include "ether.h"#include "net.h"#include "io.h"#define RECVPORT   0x0000 // Recive Data Port.#define XMITPORT   0x0000 // Transmit Data Port.#define TXCMDPORT  0x0004 // TxCMD (Transmit Command)#define TXLENPORT  0x0006 // TxLength (Transmit Length)#define INTSTATQUE 0x0008 // Interrupt Status Que.#define ADD_PORT   0x000A // PacketPage Pointer port.#define DATA_PORT  0x000C // PacketPage Data port./* EEPROM data and command registers */#define PP_EECMD 0x0040		/*  NVR Interface Command register */#define PP_EEData 0x0042	/*  NVR Interface Data Register */#define PP_DebugReg 0x0044	/*  Debug Register */#define PP_RxCFG 0x0102		/*  Rx Bus config */#define PP_RxCTL 0x0104		/*  Receive Control Register */#define PP_TxCFG 0x0106		/*  Transmit Config Register */#define PP_TxCMD 0x0108		/*  Transmit Command Register */#define PP_BufCFG 0x010A	/*  Bus configuration Register */#define PP_LineCTL 0x0112	/*  Line Config Register */#define PP_SelfCTL 0x0114	/*  Self Command Register */#define PP_BusCTL 0x0116	/*  ISA bus control Register */#define PP_TestCTL 0x0118	/*  Test Register */#define PP_AutoNegCTL 0x011C	/*  Auto Negotiation Ctrl */#define PP_ISQ 0x0120		/*  Interrupt Status */#define PP_RxEvent 0x0124	/*  Rx Event Register */#define PP_TxEvent 0x0128	/*  Tx Event Register */#define PP_BufEvent 0x012C	/*  Bus Event Register */#define PP_RxMiss 0x0130	/*  Receive Miss Count */#define PP_TxCol 0x0132		/*  Transmit Collision Count */#define PP_LineST 0x0134	/*  Line State Register */#define PP_SelfST 0x0136	/*  Self State register */#define PP_BusST 0x0138		/*  Bus Status */#define PP_TDR 0x013C		/*  Time Domain Reflectometry */#define PP_AutoNegST 0x013E	/*  Auto Neg Status */#define PP_TxCommand 0x0144	/*  Tx Command */#define PP_TxLength 0x0146	/*  Tx Length */#define PP_LAF 0x0150		/*  Hash Table */#define PP_IA 0x0158		/*  Physical Address Register */#define PP_RxStatus 0x0400	/*  Receive start of frame */#define PP_RxLength 0x0402	/*  Receive Length of frame */#define PP_RxFrame 0x0404	/*  Receive frame pointer */#define PP_TxFrame 0x0A00	/*  Transmit frame pointer */#define PP_ChipID    0x0000#define PRODUCT_ID_ADD 0x0002   /*  Address of product ID */#define PP_SelfST 0x0136	/*  Self State register */#define INTCNTRL   0x0022#define RECVCONF   0x0102#define RECVCNTRL  0x0104#define XMITCONF   0x0106#define BUFFCONF   0x010A#define LINECNTRL  0x0112#define SELFCNTRL  0x0114#define BUSCNTRL   0x0116#define RECVEVENT  0x0124 // register 4#define XMITEVENT  0x0128#define SELFSTATUS 0x0136#define BUSSTATUS  0x0138#define MACREG1    0x0158#define MACREG2    0x015A#define MACREG3    0x015C#define RXSTATUS   0x0400#define RXLENGTH   0x0402#define CHIP_EISA_ID_SIG	0x630E#ifdef BSPCONF_BTLDR_CS8900_DEBUGstatic unsigned short last_readreg_addr, last_readreg_data;#endif/****************************** Routine: Description: ******************************/static __inline__ void outw(unsigned short reg_offset, unsigned short val){  *((volatile unsigned short *)(BSPCONF_ETHERNET_BASE+reg_offset)) = val;}  /****************************** Routine: Description: ******************************/static __inline__ unsigned short inw(unsigned short reg_offset){  return *((volatile unsigned short *)(BSPCONF_ETHERNET_BASE+reg_offset));}/****************************** Routine: Description: ******************************/static void __inline__ outb(unsigned short reg_offset, unsigned char val){  *((volatile unsigned char *)(reg_offset+BSPCONF_ETHERNET_BASE)) = val;}  /****************************** Routine: Description: ******************************/static __inline__ unsigned char inb(unsigned short reg_offset){  return *((volatile unsigned char *)(reg_offset+BSPCONF_ETHERNET_BASE));}/****************************** Routine: Description: ******************************/static __inline__ void insw(unsigned short port, void* buf, unsigned int count){  register unsigned short* wbuf = (unsigned short*) buf;  while(count--)    *wbuf++  = inw(port);}/****************************** Routine: Description: ******************************/static __inline__ void outsw(unsigned short port, const void* buf, unsigned int count){  register const unsigned short* wbuf = (const unsigned short*) buf;  while(count--)    outw(port,*wbuf++);}/****************************** Routine: Description: ******************************/static void writereg(unsigned short reg_offset, unsigned short val){#ifdef BSPCONF_BTLDR_CS8900_DEBUG  util_printf("writereg: %x = %x \n", reg_offset, val);#endif  outw(ADD_PORT,reg_offset);//  barrier();  outw(DATA_PORT,val);}/****************************** Routine: Description: ******************************/#ifdef BSPCONF_BTLDR_CS8900_DEBUGunsigned short readreg_silent(unsigned short reg_offset){  outw(ADD_PORT,reg_offset);  return(inw(DATA_PORT));}#endif/****************************** Routine: Description: ******************************/unsigned short readreg(unsigned short reg_offset){ unsigned j;//#ifdef BSPCONF_BTLDR_CS8900_DEBUG//  unsigned short i;//  outw(ADD_PORT,reg_offset);//  i=inw(DATA_PORT);//  if ( ( last_readreg_addr != reg_offset ) ||//       ( last_readreg_data != i ) )//  {//    util_printf(" readreg: %x = %x \n", reg_offset, i);//    last_readreg_addr = reg_offset;//    last_readreg_data = i;//  }//  return(i);//#else  outw(ADD_PORT,reg_offset);//  io_delay(100);//  barrier();  j = inw(DATA_PORT);//  io_delay(500);  return(j);//#endif}/****************************** Routine: Description: ******************************/static void chip_online(void){  // Next, put the chip on-line with the wire.  writereg(LINECNTRL,0x0000);  writereg(INTCNTRL,0x0000);  writereg(BUFFCONF,0x3300);  writereg(BUSCNTRL,0x0000);    writereg(RECVCNTRL,0x0D00);  writereg(RECVCONF,0x1100);  writereg(LINECNTRL,0x00D3);}/****************************** Routine: Description: ******************************/#if 0static void chip_offline(void){  // Next, take the chip off-line from the wire.  writereg(LINECNTRL,0x0000);}#endif/****************************** Routine: Description: ******************************/static void chip_reset(void){