?? sysinit.s
字號:
INCLUDE option.inc
INCLUDE memcfg.inc
;****************************************************************************
;存儲器空間
;GCS6 64M 16bit(8MB) DRAM/SDRAM(0xc000000-0xc7fffff)
;APP RAM=0xc000000~0xc7effff
;44BMON RAM=0xc7f0000-0xc7fffff
;STACK =0xc7ffa00
;****************************************************************************
;中斷控制預(yù)定義
INTPND EQU 0x01e00004
INTMOD EQU 0x01e00008
INTMSK EQU 0x01e0000c
I_ISPR EQU 0x01e00020
I_CMST EQU 0x01e0001c
I_ISPC EQU 0x01e00024
;****************************************************************************
;看門狗定時器預(yù)定義
WTCON EQU 0x01d30000
;****************************************************************************
;系統(tǒng)時鐘預(yù)定義
PLLCON EQU 0x01d80000
CLKCON EQU 0x01d80004
LOCKTIME EQU 0x01d8000c
;****************************************************************************
;存儲器控制預(yù)定義
REFRESH EQU 0x01c80024
;****************************************************************************
;BDMA目的寄存器
BDIDES0 EQU 0x1f80008
BDIDES1 EQU 0x1f80028
;****************************************************************************
AREA reset, CODE, READONLY
;*****************************************************************
;初始化程序開始
EXPORT InitSystem
InitSystem
;禁止看門狗
ldr r0, =WTCON
ldr r1, =0
str r1,[r0]
;禁止所有中斷
ldr r0,=INTMSK
ldr r1,=0x07ffffff
str r1,[r0]
;設(shè)定時鐘控制寄存器
ldr r0, =LOCKTIME
ldr r1, =0xfff
str r1, [r0]
;[ PLLONSTART
ldr r0, =PLLCON ;鎖相環(huán)倍頻設(shè)定
ldr r1, =((M_DIV<<12)+(P_DIV<<4)+S_DIV) ;設(shè)定系統(tǒng)主時鐘頻率, 倍頻為((P_DIV+2)*(2的S_DIV次方))/(M_DIV+8)
str r1, [r0]
;]
ldr r0, =CLKCON
ldr r1, =0x7ff8 ;所有功能單元塊時鐘使能
str r1, [r0]
;****************************************************************************
;為BDMA改變BDMACON的復(fù)位值
ldr r0, =BDIDES0
ldr r1, =0x40000000 ;BDIDESn reset value should be 0x40000000
str r1, [r0]
ldr r0, =BDIDES1
ldr r1, =0x40000000 ;BDIDESn reset value should be 0x40000000
str r1, [r0]
;****************************************************
;設(shè)定存儲器控制寄存器
adr r0, InitSystem
ldr r1, =InitSystem
sub r0, r1, r0
ldr r1, =SMRDATA
sub r0, r1, r0
ldmia r0, {r1-r13}
ldr r0, =0x01c80000 ;BWSCON Address
stmia r0, {r1-r13}
;***********************************************
mov pc, lr ;返回
;*****************************************************************
SMRDATA DATA
;*****************************************************************
;存儲器最好配置成最優(yōu)的性能,下面的參數(shù)不是最優(yōu)化的
;*****************************************************************
;*** memory access cycle parameter strategy ***
; 1) Even FP-DRAM, EDO setting has more late fetch point by half-clock
; 2) The memory settings,here, are made the safe parameters even at 66Mhz.
; 3) FP-DRAM Parameters:tRCD=3 for tRAC, tcas=2 for pad delay, tcp=2 for bus load.
; 4) DRAM refresh rate is for 40Mhz.
;bank0 16bit BOOT ROM
;bank1 8bit NandFlash
;bank2 16bit IDE
;bank3 rtl8019
;bank4 8bit pdiusbd12
;bank5 8bit sl811hst
;bank6 16bit SDRAM
;bank7 8bit SmartMedia Card;16bit SDRAM
;LZ44B0X rtl8019 buswide = 16 !
[ BUSWIDTH=16
DCD 0x01001102 ;Bank0=16bit BootRom(AT29C010A*2) :0x0
| ;BUSWIDTH=32
DCD 0x22222220 ;Bank0=OM[1:0], Bank1~Bank7=32bit
]
DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;GCS0
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS1
DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;GCS2
DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;GCS3
DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;GCS4
DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;GCS5
[ BDRAMTYPE="DRAM"
DCD ((B6_MT<<15)+(B6_Trcd<<4)+(B6_Tcas<<3)+(B6_Tcp<<2)+(B6_CAN)) ;GCS6 check the MT value in parameter.a
DCD ((B7_MT<<15)+(B7_Trcd<<4)+(B7_Tcas<<3)+(B7_Tcp<<2)+(B7_CAN)) ;GCS7
| ;"SDRAM"
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6
;DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS7
]
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) ;REFRESH RFEN=1, TREFMD=0, trp=3clk, trc=5clk, tchr=3clk,count=1019
DCD 0x10 ;SCLK power down mode, BANKSIZE 32M/32M
DCD 0x20 ;MRSR6 CL=2clk
DCD 0x20 ;MRSR7
ALIGN
;****************************************************
;本函數(shù)用來進(jìn)入掉電模式
;****************************************************
;void EnterPWDN(int CLKCON);
EnterPWDN
mov r2,r0 ;r0=CLKCON
ldr r0,=REFRESH
ldr r3,[r0]
mov r1, r3
orr r1, r1, #0x400000 ;self-refresh enable
str r1, [r0]
nop ;Wait until self-refresh is issued. May not be needed.
nop ;If the other bus master holds the bus, ...
nop ; mov r0, r0
nop
nop
nop
nop
;enter POWERDN mode
ldr r0,=CLKCON
str r2,[r0]
;wait until enter SL_IDLE,STOP mode and until wake-up
ldr r0,=0x10
0 subs r0,r0,#1
bne %B0
;exit from DRAM/SDRAM self refresh mode.
ldr r0,=REFRESH
str r3,[r0]
mov pc,lr
;*******************************************************
EXPORT IRQ_SERVICE
IRQ_SERVICE ;using I_ISPR register.
;IMPORTANT CAUTION!!!
;if I_ISPC isn't used properly, I_ISPR can be 0 in this routine.
ldr r4, =I_ISPR
ldr r4, [r4]
cmp r4, #0x0 ;If the IDLE mode work-around is used, r0 may be 0 sometimes.
beq %F3
ldr r5, =I_ISPC
str r4, [r5] ;clear interrupt pending bit
ldr r5, =pIrqStart
ldr r5, [r5]
cmp r5, #0
movne lr, pc ; .+8
movne pc, r5
mov r0, #0x0
0
movs r4, r4, lsr #1
bcs %F1
add r0, r0, #1
b %B0
1
ldr r1, =pIrqHandler
ldr r1, [r1]
cmp r1, #0
movne lr, pc
movne pc, r1
2
ldr r0, =pIrqFinish
ldr r0, [r0]
cmp r0, #0
movne lr, pc ; .+8
movne pc, r0
cmp r0, #0
movne lr, pc
movne pc, r0
3
ldmfd sp!, {r0} ;從IRQ返回
msr spsr_cxsf, r0
ldmfd sp!, {r0-r12, pc}^
;***********************************************
EXPORT IrqHandlerTab
IrqHandlerTab DCD HandleADC
;***********************************************
DRAM_END EQU 0x0c800000
AREA RamData, DATA, READWRITE
^ (DRAM_END - 0x800)
UserStack # 256
SVCStack # 256
UndefStack # 256
AbortStack # 256
IRQStack # 256
FIQStack # 256
EXPORT UserStack
EXPORT SVCStack
EXPORT UndefStack
EXPORT AbortStack
EXPORT IRQStack
EXPORT FIQStack
MAP (DRAM_END - 0x100)
SysRstVector # 4
UdfInsVector # 4
SwiSvcVector # 4
InsAbtVector # 4
DatAbtVector # 4
ReservedVector # 4
IrqSvcVector # 4
FiqSvcVector # 4
EXPORT SysRstVector
EXPORT UdfInsVector
EXPORT SwiSvcVector
EXPORT InsAbtVector
EXPORT DatAbtVector
EXPORT ReservedVector
EXPORT IrqSvcVector
EXPORT FiqSvcVector
MAP (DRAM_END - 0xe0)
;Don't use the label 'IntVectorTable',
;because armasm.exe cann't recognize this label correctly.
;the value is different with an address you think it may be.
;IntVectorTable
HandleADC # 4
HandleRTC # 4
HandleUTXD1 # 4
HandleUTXD0 # 4
HandleSIO # 4
HandleIIC # 4
HandleURXD1 # 4
HandleURXD0 # 4
HandleTIMER5 # 4
HandleTIMER4 # 4
HandleTIMER3 # 4
HandleTIMER2 # 4
HandleTIMER1 # 4
HandleTIMER0 # 4
HandleUERR01 # 4
HandleWDT # 4
HandleBDMA1 # 4
HandleBDMA0 # 4
HandleZDMA1 # 4
HandleZDMA0 # 4
HandleTICK # 4
HandleEINT4567 # 4
HandleEINT3 # 4
HandleEINT2 # 4
HandleEINT1 # 4
HandleEINT0 # 4
MAP (DRAM_END - 0x20)
pIrqStart # 4
pIrqHandler # 4
pIrqFinish # 4
EXPORT pIrqStart
EXPORT pIrqHandler
EXPORT pIrqFinish
;****************************************************************************
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