library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;              

entity kbscan is
 port(
    row: in std_logic_vector(3 downto 0);   
    clk_kb: in std_logic;
    col: out std_logic_vector(3 downto 0);
    data:out std_logic_vector(3 downto 0);
    int0: out std_logic);
end kbscan;

architecture behave of kbscan is
signal cnt: integer range 0 to 3;
begin 
process(clk_kb)
  begin
       if(clk_kb'event and clk_kb='1') then
       if(row="1111") then
        cnt<=cnt+1;    
       else
        cnt<=cnt;
         end if;
    end if;
end process;
 process(cnt)
  begin
   case cnt is
        when 0=>
          col<="1110";
           case row is
             when "1110"=> data<="0001";int0<='0'; 
             when "1101"=> data<="0100";int0<='0';
             when "1011"=> data<="0111";int0<='0';             
             when "0111"=> data<="1010";int0<='0';
             when others=> data<="ZZZZ";int0<='1';            
          end case;
        when 1=>     
          col<="1101";
           case row is
             when "1110"=> data<="0010";int0<='0'; 
             when "1101"=> data<="0101";int0<='0'; 
             when "1011"=> data<="1000";int0<='0'; 
             when "0111"=> data<="1011";int0<='0';
             when others=> data<="ZZZZ";int0<='1';
           end case;
        when 2=>   
          col<="1011";
           case row is
             when "1110"=> data<="0011"; int0<='0';
             when "1101"=> data<="0110"; int0<='0';
             when "1011"=> data<="1001"; int0<='0';
             when "0111"=> data<="1100"; int0<='0';
             when others=> data<="ZZZZ"; int0<='1';
           end case;
        when others=>  
          col<="0111";
           case row is
             when "1110"=> data<="0000"; int0<='0';
             when others=> data<="ZZZZ"; int0<='1';
           end case;
        end case;
end process;
end behave;