rule PCB (clearance -1 same_net (type wire_via))
rule PCB (clearance -1 same_net (type smd_smd))
rule PCB (clearance -1 same_net (type smd_pin))
rule PCB (clearance -1 same_net (type smd_via))
rule PCB (clearance -1 same_net (type pin_pin))
rule PCB (clearance -1 same_net (type pin_via))
rule PCB (clearance -1 same_net (type via_via))
rule PCB (clearance -1 same_net (type test_test))
rule PCB (clearance -1 same_net (type test_wire))
rule PCB (clearance -1 same_net (type test_smd))
rule PCB (clearance -1 same_net (type test_pin))
rule PCB (clearance -1 same_net (type test_via))
rule PCB (clearance 0 same_net (type area_wire))
rule PCB (clearance 0 same_net (type area_smd))
rule PCB (clearance 0 same_net (type area_area))
rule PCB (clearance 0 same_net (type area_pin))
rule PCB (clearance 0 same_net (type area_via))
rule PCB (clearance 0 same_net (type area_test))
rule PCB (clearance 6 same_net (type microvia_microvia))
set microvia_microvia same_net off
rule PCB (clearance 6 same_net (type microvia_thrupin))
set microvia_thrupin same_net off
rule PCB (clearance 6 same_net (type microvia_smdpin))
set microvia_smdpin same_net off
rule PCB (clearance 6 same_net (type microvia_thruvia))
set microvia_thruvia same_net off
rule PCB (clearance 6 same_net (type microvia_bbvia))
set microvia_bbvia same_net off
rule PCB (clearance 6 same_net (type microvia_wire))
set microvia_wire same_net off
rule PCB (clearance 6 same_net (type microvia_testpin))
set microvia_testpin same_net off
rule PCB (clearance 6 same_net (type microvia_testvia))
set microvia_testvia same_net off
rule PCB (clearance 6 same_net (type microvia_bondpad))
set microvia_bondpad same_net off
rule PCB (clearance 6 same_net (type microvia_area))
set microvia_area same_net off
rule PCB (clearance 6 same_net (type nhole_pin))
set nhole_pin same_net off
rule PCB (clearance 6 same_net (type nhole_via))
set nhole_via same_net off
rule PCB (clearance 6 same_net (type nhole_wire))
set nhole_wire same_net off
rule PCB (clearance 6 same_net (type nhole_area))
set nhole_area same_net off
rule PCB (clearance 6 same_net (type nhole_nhole))
set nhole_nhole same_net off
rule class SYNC (clearance 8 same_net (type microvia_microvia))
rule class SYNC (clearance 8 same_net (type microvia_thrupin))
rule class SYNC (clearance 8 same_net (type microvia_smdpin))
rule class SYNC (clearance 8 same_net (type microvia_thruvia))
rule class SYNC (clearance 8 same_net (type microvia_bbvia))
rule class SYNC (clearance 8 same_net (type microvia_wire))
rule class SYNC (clearance 8 same_net (type microvia_testpin))
rule class SYNC (clearance 8 same_net (type microvia_testvia))
rule class SYNC (clearance 8 same_net (type microvia_bondpad))
rule class SYNC (clearance 8 same_net (type microvia_area))
rule class SYNC (clearance 8 same_net (type nhole_pin))
rule class SYNC (clearance 8 same_net (type nhole_via))
rule class SYNC (clearance 8 same_net (type nhole_wire))
rule class SYNC (clearance 8 same_net (type nhole_area))
rule class SYNC (clearance 8 same_net (type nhole_nhole))
rule net VCLKC (clearance 8 same_net (type microvia_microvia))
rule net VCLKC (clearance 8 same_net (type microvia_thrupin))
rule net VCLKC (clearance 8 same_net (type microvia_smdpin))
rule net VCLKC (clearance 8 same_net (type microvia_thruvia))
rule net VCLKC (clearance 8 same_net (type microvia_bbvia))
rule net VCLKC (clearance 8 same_net (type microvia_wire))
rule net VCLKC (clearance 8 same_net (type microvia_testpin))
rule net VCLKC (clearance 8 same_net (type microvia_testvia))
rule net VCLKC (clearance 8 same_net (type microvia_bondpad))
rule net VCLKC (clearance 8 same_net (type microvia_area))
rule net VCLKC (clearance 8 same_net (type nhole_pin))
rule net VCLKC (clearance 8 same_net (type nhole_via))
rule net VCLKC (clearance 8 same_net (type nhole_wire))
rule net VCLKC (clearance 8 same_net (type nhole_area))
rule net VCLKC (clearance 8 same_net (type nhole_nhole))
rule net VCLKA (clearance 8 same_net (type microvia_microvia))
rule net VCLKA (clearance 8 same_net (type microvia_thrupin))
rule net VCLKA (clearance 8 same_net (type microvia_smdpin))
rule net VCLKA (clearance 8 same_net (type microvia_thruvia))
rule net VCLKA (clearance 8 same_net (type microvia_bbvia))
rule net VCLKA (clearance 8 same_net (type microvia_wire))
rule net VCLKA (clearance 8 same_net (type microvia_testpin))
rule net VCLKA (clearance 8 same_net (type microvia_testvia))
rule net VCLKA (clearance 8 same_net (type microvia_bondpad))
rule net VCLKA (clearance 8 same_net (type microvia_area))
rule net VCLKA (clearance 8 same_net (type nhole_pin))
rule net VCLKA (clearance 8 same_net (type nhole_via))
rule net VCLKA (clearance 8 same_net (type nhole_wire))
rule net VCLKA (clearance 8 same_net (type nhole_area))
rule net VCLKA (clearance 8 same_net (type nhole_nhole))
rule pcb (tjunction on)(junction_type all)
rule pcb (staggered_via on (min_gap 5))
rule class SYNC (tjunction on)(junction_type all)
rule class SYNC (staggered_via on (min_gap 5))
circuit class SYNC (use_via VIA )
rule pcb (via_at_smd off)
rule PCB (turn_under_pad off)
define (class SYNC (layer_rule TOP (rule (time_length_factor 1.47988E-004))))
define (class SYNC (layer_rule BOTTOM (rule (time_length_factor 1.47988E-004))))
rule layer TOP (restricted_layer_length_factor 1)
rule layer TOP (time_length_factor 1.45849E-004)
rule layer BOTTOM (restricted_layer_length_factor 1)
rule layer BOTTOM (time_length_factor 1.45849E-004)
define (net DHEN (fromto U4-22 U2-1  (circuit (min_delay 0.00000)(max_delay 1.00000))))
define (net V12N (layer_rule TOP (rule (time_length_factor 1.52961E-004))))
define (net V12N (layer_rule BOTTOM (rule (time_length_factor 1.52961E-004))))
define (net AGND (layer_rule TOP (rule (time_length_factor 1.52961E-004))))
define (net AGND (layer_rule BOTTOM (rule (time_length_factor 1.52961E-004))))
define (net V12P (layer_rule TOP (rule (time_length_factor 1.52961E-004))))
define (net V12P (layer_rule BOTTOM (rule (time_length_factor 1.52961E-004))))
define (net GND_EARTH (layer_rule TOP (rule (time_length_factor 1.52961E-004))))
define (net GND_EARTH (layer_rule BOTTOM (rule (time_length_factor 1.52961E-004))))
define (net VCC (layer_rule TOP (rule (time_length_factor 1.52961E-004))))
define (net VCC (layer_rule BOTTOM (rule (time_length_factor 1.52961E-004))))
rule class '_difpr_DP-D1' (diffpair_line_width 6)
rule class '_difpr_DP-D1' (neck_down_width 6)
rule class '_difpr_DP-BA' (diffpair_line_width 6)
rule class '_difpr_DP-BA' (neck_down_width 6)
rule class _difpr_DP1 (diffpair_line_width 6)
rule class _difpr_DP1 (neck_down_width 6)
rule class '_difpr_DP-BD' (diffpair_line_width 6)
rule class '_difpr_DP-BD' (neck_down_width 6)
rule class '_difpr_DP-RA' (diffpair_line_width 6)
rule class '_difpr_DP-RA' (neck_down_width 6)
rule class '_difpr_DP-RD' (diffpair_line_width 6)
rule class '_difpr_DP-RD' (neck_down_width 6)
rule class '_difpr_DP-VD' (diffpair_line_width 6)
rule class '_difpr_DP-VD' (neck_down_width 6)
rule class '_difpr_DP-BD1' (diffpair_line_width 6)
rule class '_difpr_DP-BD1' (neck_down_width 6)
rule class '_difpr_DP-A' (diffpair_line_width 6)
rule class '_difpr_DP-A' (neck_down_width 6)
rule class '_difpr_DP-RA1' (diffpair_line_width 6)
rule class '_difpr_DP-RA1' (neck_down_width 6)
rule class '_difpr_DP-D' (diffpair_line_width 6)
rule class '_difpr_DP-D' (neck_down_width 6)
rule class '_difpr_DP-Q' (diffpair_line_width 6)
rule class '_difpr_DP-Q' (neck_down_width 6)
rule class '_difpr_DP-RCS' (diffpair_line_width 6)
rule class '_difpr_DP-RCS' (neck_down_width 6)
rule class '_difpr_DP-A1' (diffpair_line_width 6)
rule class '_difpr_DP-A1' (neck_down_width 6)
rule class '_difpr_DP-A2' (diffpair_line_width 6)
rule class '_difpr_DP-A2' (neck_down_width 6)
write colormap _notify.std
# do C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaal00356.tmp
unselect all routing
select component C3
set route_diagonal 0
grid wire 0.010000 (direction x) (offset 0.000000)
grid wire 0.010000 (direction y) (offset 0.000000)
grid via 0.010000 (direction x) (offset 0.000000)
grid via 0.010000 (direction y) (offset 0.000000)
protect all wires
direction TOP horizontal
select layer TOP
unprotect layer_wires TOP
direction BOTTOM vertical
select layer BOTTOM
unprotect layer_wires BOTTOM
cost via -1
set turbo_stagger off
limit outside -1
rule pcb (patterns_allowed  trombone accordion)
set pattern_stacking on
rule pcb (sawtooth_amplitude -1 -1)
rule pcb (sawtooth_gap -1)
rule pcb (accordion_amplitude -1 -1)
rule pcb (accordion_gap -1)
rule pcb (trombone_run_length -1)
rule pcb (trombone_gap -1)
unprotect selected
fanout 1 (direction In_out) (location Anywhere) (pin_type power) (pin_type signal)
write routes (changed_only) (reset_changed) C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaam00356.tmp
# do C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaan00356.tmp
unselect all routing
select component U3
set route_diagonal 0
grid wire 0.010000 (direction x) (offset 0.000000)
grid wire 0.010000 (direction y) (offset 0.000000)
grid via 0.010000 (direction x) (offset 0.000000)
grid via 0.010000 (direction y) (offset 0.000000)
protect all wires
direction TOP horizontal
select layer TOP
unprotect layer_wires TOP
direction BOTTOM vertical
select layer BOTTOM
unprotect layer_wires BOTTOM
cost via -1
set turbo_stagger off
limit outside -1
rule pcb (patterns_allowed  trombone accordion)
set pattern_stacking on
rule pcb (sawtooth_amplitude -1 -1)
rule pcb (sawtooth_gap -1)
rule pcb (accordion_amplitude -1 -1)
rule pcb (accordion_gap -1)
rule pcb (trombone_run_length -1)
rule pcb (trombone_gap -1)
unprotect selected
fanout 1 (direction In_out) (location Anywhere) (pin_type power) (pin_type signal)
write routes (changed_only) (reset_changed) C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaao00356.tmp
quit -c