.DC
Copyright (C) NEC Electronics Corporation 2001,2003 All rights reserved by NEC Electronics Corporation. This program must be used solely for the purpose for which it was furnished by NEC Electronics Corporation. No part of this program may be reproduced or disclosed to others, in any form, without the prior written permission of NEC Electronics Corporation.
.DV
SM plus for uPD78F9221 E1.00a [2003 Oct 31]
.TB
CPU78K0S,device\\common\\cpu78k0s,"";
CGX,device\\common\\cgx,"";
INTC_78K0S,device\\common\\intc_78k0s,"";
PORT78K,device\\common\\port,"";
QLKSETM0,device\\common\\qlksetm0,"";
QLKSETMH,device\\common\\qlksetmh,"";
QLKSETM8,device\\common\\qlksetm8,"";
QLK0SEUART6,device\\common\\qlk0seuart6,"";
QLK0SEADCTL0,device\\common\\qlk0seadctl0,"";
POCLVI,device\\common\\qlnpupoclvictl0,"";
QLNPUWDT,device\\common\\qlnpuwdt,"";

BROWSEWAVE,common\\gui_browsewave,""
SIGNALDATAEDITOR,common\\gui_editwave,""
IOPANEL,common\\gui_panel,""
STDIO,common\\gui_stdio,""
SERIAL,common\\gui_serial,""

.CI

#========================================================================
#	Generation
#========================================================================

#------	bus	---------------------------------------------------------
bus=BUS(8);

#------	cpu	---------------------------------------------------------
cpu=CPU('a',"CPU78K0S");

#------	cgx	---------------------------------------------------------
cgx = Device("CGX","-a=0xff00 -cg_type=CG_KX1");

#------	intc	---------------------------------------------------------
intc = Device("INTC_78K0S","-a=0xff00 -n=16");

#------	port	---------------------------------------------------------
port = Device("PORT78K","-a=0xff00 -port_type=PORT_KX1 -p=0/Sp:Sp:Sp:Sp:::: -p=2/Lhg:Lhg:Lhg:Lhg:::: -p=3/Lha:Lhb:Lcr:Lcr:Lhd::: -p=4/Lcr:Lhc:Lhf:Lhe:Lhd:Lcr:Lcr:Lcr -p=12/Lcr:Sp:Sp:Sp:::: -p=13/Sp:::::::");

#------	timer0	---------------------------------------------------------
timer0 = Device("QLKSETM0","-a=0xFF12 -prj=QLKSETM0");

#------	timerH	---------------------------------------------------------
timerH = Device("QLKSETMH","-a=0xFF0E -prj=QLKSETMH");

#------	timer8	---------------------------------------------------------
timer8 = Device("QLKSETM8","-a=0xFFCC -prj=QLKSETM8");

#------	uart6	---------------------------------------------------------
uart6 = Device("QLK0SEUART6","-a=0xFF00");

#------	ad	---------------------------------------------------------
adctl0 = Device("QLK0SEADCTL0","-a=0xFF00");

#------	poclvi	---------------------------------------------------------
poclvi = Device("POCLVI","-a=0xff50");

#------	wdt	---------------------------------------------------------
#wdt = Device("QLNPUWDT","-a=0xff48 -mode0=1 -mode1=1 -wdt_type=WDT_KX1");
wdt = Device("QLNPUWDT","-a=0xff48 -mode0=0 -mode1=0");

#========================================================================
#	Bus connections
#========================================================================

bus += cpu.BusMasterIF("NPB");

#------	timer0	---------------------------------------------------------
bus += timer0.BusSlaveIF("TM0");
bus += timer0.BusSlaveIF("CR00");
bus += timer0.BusSlaveIF("CR01");
bus += timer0.BusSlaveIF("TMC0");
bus += timer0.BusSlaveIF("PRM0");
bus += timer0.BusSlaveIF("CRC0");
bus += timer0.BusSlaveIF("TOC0");

#------	timerH	---------------------------------------------------------
bus += timerH.BusSlaveIF("TMHMD");
bus += timerH.BusSlaveIF("TMCYC");
bus += timerH.BusSlaveIF("CMP0");
bus += timerH.BusSlaveIF("CMP1");

#------	timer8	---------------------------------------------------------
bus += timer8.BusSlaveIF("TMC8");
bus += timer8.BusSlaveIF("CR8");
bus += timer8.BusSlaveIF("TM8");

#------	uart6	---------------------------------------------------------
bus += uart6.BusSlaveIF("ASIM");
bus += uart6.BusSlaveIF("RXB");
bus += uart6.BusSlaveIF("ASIS");
bus += uart6.BusSlaveIF("TXB");
bus += uart6.BusSlaveIF("ASIF");
bus += uart6.BusSlaveIF("CKSR");
bus += uart6.BusSlaveIF("BRGC");
bus += uart6.BusSlaveIF("ASICL");
bus += uart6.BusSlaveIF("TXS");

#------	ad	---------------------------------------------------------
bus += adctl0.BusSlaveIF("ADM");
bus += adctl0.BusSlaveIF("ADS");
bus += adctl0.BusSlaveIF("ADCR");
bus += adctl0.BusSlaveIF("ADCRH");

#------	intc	---------------------------------------------------------
bus += intc.BusSlaveIF("IF0");
bus += intc.BusSlaveIF("IF1");
bus += intc.BusSlaveIF("MK0");
bus += intc.BusSlaveIF("MK1");
bus += intc.BusSlaveIF("INTM0");
bus += intc.BusSlaveIF("INTM1");

#------	poclvi	---------------------------------------------------------
bus += poclvi.BusSlaveIF("LVIM");
bus += poclvi.BusSlaveIF("LVIS");

#------	port	---------------------------------------------------------
# port0
bus += port.BusSlaveIF("P0");
bus += port.BusSlaveIF("PM0");
# port2
bus += port.BusSlaveIF("P2");
bus += port.BusSlaveIF("PM2");
bus += port.BusSlaveIF("PMC2");
# port3
bus += port.BusSlaveIF("P3");
bus += port.BusSlaveIF("PM3");
bus += port.BusSlaveIF("PU3");
# port4
bus += port.BusSlaveIF("P4");
bus += port.BusSlaveIF("PM4");
bus += port.BusSlaveIF("PU4");
# port12
bus += port.BusSlaveIF("P12");
bus += port.BusSlaveIF("PM12");
bus += port.BusSlaveIF("PU12");
# port13
bus += port.BusSlaveIF("P13");

#------	cgx	---------------------------------------------------------
bus += cgx.BusSlaveIF("PCC");
bus += cgx.BusSlaveIF("PPCC");
bus += cgx.BusSlaveIF("LSRCM");
bus += cgx.BusSlaveIF("HSRCM");
bus += cgx.BusSlaveIF("OSTS");
bus += cgx.BusSlaveIF("RESF");

#------	wdt	---------------------------------------------------------
bus += wdt.BusSlaveIF("WDTM2");
bus += wdt.BusSlaveIF("WDTE");


#========================================================================
#	Port connections
#========================================================================

#------	cpu	---------------------------------------------------------

#------	cgx	---------------------------------------------------------
# rg
wire_cgx_dbgreset = Wire(1);
wire_cgx_dbgreset += cgx.Port("DBGRESET");
wire_cgx_dbgreset += cpu.DebuggerPseudoPort("debugger_pseudo_pin_reset_notice");
wire_cgx_resetz = Wire(1);
wire_cgx_resetz += cgx.Port("RESETZ");
wire_cgx_wdtres = Wire(1);
wire_cgx_wdtres += cgx.Port("WDTRES");
wire_cgx_pocres = Wire(1);
wire_cgx_pocres += cgx.Port("POCRES");
wire_cgx_lvires = Wire(1);
wire_cgx_lvires += cgx.Port("LVIRES");
wire_cgx_lvimclrres = Wire(1);
wire_cgx_lvimclrres += cgx.Port("LVIMCLRRES");
wire_cgx_vpres = Wire(1);
wire_cgx_vpres += cgx.Port("VPRES");
wire_cgx_vpres += cpu.Port("VPRESZ");
# stbc
wire_cgx_intrq = Wire(1);
wire_cgx_intrq += cgx.Port("INTRQ");
# cg
wire_cgx_fx = Wire(1);
wire_cgx_fx += cgx.Port("FX");
#wire_cgx_fx += cpu.DebuggerPseudoPort("debugger_pseudo_pin_main_clk");
wire_cgx_fx += cpu.DebuggerPseudoPort("debugger_pseudo_pin_fx_clk");
wire_cgx_fxt = Wire(1);
wire_cgx_fxt += cgx.Port("FXT");
#wire_cgx_fxt += cpu.DebuggerPseudoPort("debugger_pseudo_pin_sub_clk");
wire_cgx_fxt += cpu.DebuggerPseudoPort("debugger_pseudo_pin_fxt_clk");
wire_cgx_clkc1 = Wire(1);
wire_cgx_clkc1 += cgx.Port("CLKC1");
wire_cgx_clkc1 += cpu.Port("FCPU");
wire_cgx_clkc1 += cpu.DebuggerPseudoPort("debugger_pseudo_pin_main_clkin");
wire_cgx_optbyte = Wire(8);
wire_cgx_optbyte += cgx.Port("OPTBYTE");
wire_cgx_optbyte += cpu.Port("OPTBYTE");
wire_cgx_clkc1stp = Wire(1);
wire_cgx_clkc1stp += cgx.Port("CLKC1STP");
wire_cgx_clkc1stp += cpu.Port("STOP");
# prescaler
wire_cgx_vppprs0 = Wire(1);
wire_cgx_vppprs0 += cgx.Port("VPPPRS0");
wire_cgx_vppprs1 = Wire(1);
wire_cgx_vppprs1 += cgx.Port("VPPPRS1");
wire_cgx_vppprs2 = Wire(1);
wire_cgx_vppprs2 += cgx.Port("VPPPRS2");
wire_cgx_vppprs3 = Wire(1);
wire_cgx_vppprs3 += cgx.Port("VPPPRS3");
wire_cgx_vppprs4 = Wire(1);
wire_cgx_vppprs4 += cgx.Port("VPPPRS4");
wire_cgx_vppprs5 = Wire(1);
wire_cgx_vppprs5 += cgx.Port("VPPPRS5");
wire_cgx_vppprs6 = Wire(1);
wire_cgx_vppprs6 += cgx.Port("VPPPRS6");
wire_cgx_vppprs7 = Wire(1);
wire_cgx_vppprs7 += cgx.Port("VPPPRS7");
wire_cgx_vppprs8 = Wire(1);
wire_cgx_vppprs8 += cgx.Port("VPPPRS8");
wire_cgx_vppprs9 = Wire(1);
wire_cgx_vppprs9 += cgx.Port("VPPPRS9");
wire_cgx_vppprs10 = Wire(1);
wire_cgx_vppprs10 += cgx.Port("VPPPRS10");
wire_cgx_vppprs11 = Wire(1);
wire_cgx_vppprs11 += cgx.Port("VPPPRS11");
wire_cgx_vppprs12 = Wire(1);
wire_cgx_vppprs12 += cgx.Port("VPPPRS12");
wire_cgx_vppprs13 = Wire(1);
wire_cgx_vppprs13 += cgx.Port("VPPPRS13");
wire_cgx_vppprs14 = Wire(1);
wire_cgx_vppprs14 += cgx.Port("VPPPRS14");
wire_cgx_vppprs15 = Wire(1);
wire_cgx_vppprs15 += cgx.Port("VPPPRS15");
wire_cgx_fmosc4 = Wire(1);
wire_cgx_fmosc4 += cgx.Port("FMOSC4");
wire_cgx_flsrosc4 = Wire(1);
wire_cgx_flsrosc4 += cgx.Port("FLSROSC4");
wire_cgx_flsrosc7 = Wire(1);
wire_cgx_flsrosc7 += cgx.Port("FLSROSC7");


#------	intc	---------------------------------------------------------
# RESET
wire_cgx_vpres += intc.Port("VBRES");
# cpu-if
wire_intc_pause = Wire(1);
wire_intc_pause += intc.Port("PAUSE");
wire_intc_pause += cpu.Port("PAUSE");
wire_intc_intrq = Wire(1);
wire_intc_intrq += intc.Port("INTRQ");
wire_intc_intrq += cpu.Port("INTRQ");
wire_intc_maskable = Wire(1);
wire_intc_maskable += intc.Port("MASKABLE");
wire_intc_maskable += cpu.Port("MASKABLE");
wire_intc_intlv = Wire(8);
wire_intc_intlv += intc.Port("INTLV");
wire_intc_intlv += cpu.Port("INTLV");
wire_intc_intak = Wire(1);
wire_intc_intak += intc.Port("INTAK");
wire_intc_intak += cpu.Port("INTAK");
wire_intc_clrip = Wire(1);
wire_intc_clrip += intc.Port("CLRIP");
#wire_intc_clrip += cpu.Port("CLRIP");
wire_intc_ie = Wire(1);
wire_intc_ie += intc.Port("IE");
#wire_intc_ie += cpu.Port("IE");
wire_intc_wdtm4 = Wire(1);
wire_intc_wdtm4 += intc.Port("WDTM4");
#wire_intc_wdtm4 += wdt.Port("WDTM4");