/* * (C) Copyright 2000, 2001, 2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA *//* * board/config.h - configuration options, board specific *//* Yoo. Jonghoon, IPone, yooth@ipone.co.kr * U-Boot port on RPXlite board */#ifndef __CONFIG_H#define __CONFIG_H#define	RPXClassic_50MHz/* * High Level Configuration Options * (easy to change) */#define CONFIG_MPC860           1#define CONFIG_RPXCLASSIC		1#define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/#undef	CONFIG_8xx_CONS_SMC2#undef	CONFIG_8xx_CONS_NONE#define CONFIG_BAUDRATE		9600	/* console baudrate = 9600bps	*//* Define CONFIG_FEC_ENET to use Fast ethernet instead of ethernet on SCC1   */#define CONFIG_FEC_ENET#ifdef CONFIG_FEC_ENET#define CFG_DISCOVER_PHY        1#define CONFIG_MII              1#endif /* CONFIG_FEC_ENET *//* Video console (graphic: Epson SED13806 on ECCX board, no keyboard         */#if 1#define CONFIG_VIDEO_SED13806#define CONFIG_NEC_NL6448BC20#define CONFIG_VIDEO_SED13806_16BPP#define CONFIG_CFB_CONSOLE#define CONFIG_VIDEO_LOGO#define CONFIG_VIDEO_BMP_LOGO#define CONFIG_CONSOLE_EXTRA_INFO#define CONFIG_VGA_AS_SINGLE_DEVICE#define CONFIG_VIDEO_SW_CURSOR#endif#if 0#define CONFIG_BOOTDELAY	-1	/* autoboot disabled		*/#else#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/#endif#define CONFIG_ZERO_BOOTDELAY_CHECK 1#undef	CONFIG_BOOTARGS#define CONFIG_BOOTCOMMAND							\	"tftpboot; " 								\	"setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " 	\	"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off; " 	\	"bootm"#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/#undef	CFG_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)#define	CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */#define CONFIG_COMMANDS	(CFG_CMD_ALL & ~CFG_CMD_NONSTD | CFG_CMD_ELF)/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */#include <cmd_confdefs.h>/* * Miscellaneous configurable options */#define CFG_RESET_ADDRESS	0x80000000#define	CFG_LONGHELP			/* undef to save memory		*/#define	CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define	CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/#else#define	CFG_CBSIZE	256		/* Console I/O Buffer Size	*/#endif#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */#define	CFG_MAXARGS	16		/* max number of command args	*/#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/#define CFG_MEMTEST_START	0x0040000	/* memtest works on	*/#define CFG_MEMTEST_END		0x00C0000	/* 4 ... 12 MB in DRAM	*/#define	CFG_LOAD_ADDR		0x100000	/* default load address	*/#define	CFG_HZ		1000		/* decrementer freq: 1 ms ticks	*/#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }/* * Low Level Configuration Settings * (address mappings, register initial values, etc.) * You should know what you are doing if you make changes here. *//*----------------------------------------------------------------------- * Internal Memory Mapped Register */#define CFG_IMMR		0xFA200000/*----------------------------------------------------------------------------- * I2C Configuration *----------------------------------------------------------------------------- */#define CONFIG_I2C              1#define CFG_I2C_SPEED           50000#define CFG_I2C_SLAVE           0x34/* enable I2C and select the hardware/software driver */#define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/#undef  CONFIG_SOFT_I2C			/* I2C bit-banged		*//* * Software (bit-bang) I2C driver configuration */#define I2C_PORT	1		/* Port A=0, B=1, C=2, D=3 */#define I2C_ACTIVE	(iop->pdir |=  0x00000010)#define I2C_TRISTATE	(iop->pdir &= ~0x00000010)#define I2C_READ	((iop->pdat & 0x00000010) != 0)#define I2C_SDA(bit)	if(bit) iop->pdat |=  0x00000010; \			else    iop->pdat &= ~0x00000010#define I2C_SCL(bit)	if(bit) iop->pdat |=  0x00000020; \			else    iop->pdat &= ~0x00000020#define I2C_DELAY	udelay(5)	/* 1/4 I2C clock duration */# define CFG_I2C_SPEED		50000# define CFG_I2C_SLAVE		0x34# define CFG_I2C_EEPROM_ADDR	0x50	/* EEPROM X24C16		*/# define CFG_I2C_EEPROM_ADDR_LEN 1	/* bytes of address		*//* mask of address bits that overflow into the "EEPROM chip address"    */#define CFG_I2C_EEPROM_ADDR_OVERFLOW	0x07/*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */#define CFG_INIT_RAM_ADDR	CFG_IMMR#define	CFG_INIT_RAM_END	0x3000	/* End of used area in DPRAM	*/#define	CFG_GBL_DATA_SIZE	64  /* size in bytes reserved for initial data */#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)#define	CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET/*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CFG_SDRAM_BASE _must_ start at 0 */#define	CFG_SDRAM_BASE		0x00000000#define CFG_FLASH_BASE	0xFF000000#if defined(DEBUG) || defined (CONFIG_VIDEO_SED13806) || (CONFIG_COMMANDS & CFG_CMD_IDE)#define	CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/#else#define	CFG_MONITOR_LEN		(128 << 10)	/* Reserve 128 kB for Monitor	*/#endif#define CFG_MONITOR_BASE	0xFF000000/*%%% #define CFG_MONITOR_BASE	CFG_FLASH_BASE */#define	CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*//* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */#define	CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux	*//*----------------------------------------------------------------------- * FLASH organization */#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/#define CFG_MAX_FLASH_SECT	71	/* max number of sectors on one chip	*/#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/#if 0#define	CFG_ENV_IS_IN_FLASH	1#define	CFG_ENV_OFFSET		0x20000	/*   Offset   of Environment Sector  */#define CFG_ENV_SECT_SIZE       0x8000#define	CFG_ENV_SIZE		0x8000	/* Total Size of Environment Sector  */#else#define CFG_ENV_IS_IN_NVRAM     1#define CFG_ENV_ADDR            0xfa000100#define CFG_ENV_SIZE            0x1000#endif/*----------------------------------------------------------------------- * Cache Configuration */#define CFG_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CFG_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/#endif/*----------------------------------------------------------------------- * SYPCR - System Protection Control				11-9 * SYPCR can only be written once after reset! *----------------------------------------------------------------------- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze */#define CFG_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \			 SYPCR_SWP)/*----------------------------------------------------------------------- * SIUMCR - SIU Module Configuration				11-6 *----------------------------------------------------------------------- * PCMCIA config., multi-function pin tri-state */#define CFG_SIUMCR	(SIUMCR_MLRC10)/*----------------------------------------------------------------------- * TBSCR - Time Base Status and Control				11-26 *----------------------------------------------------------------------- * Clear Reference Interrupt Status, Timebase freezing enabled