/* * (C) Copyright 2000, 2001, 2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA *//* * board/config.h - configuration options, board specific */#ifndef __CONFIG_H#define __CONFIG_H/* * High Level Configuration Options * (easy to change) */#define CONFIG_MPC823		1	/* This is a MPC823 CPU		*/#define CONFIG_RRVISION		1	/* ...on a RRvision board	*/#define CONFIG_8xx_GCLK_FREQ 64000000#define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/#undef	CONFIG_8xx_CONS_SMC2#undef	CONFIG_8xx_CONS_NONE#define CONFIG_BAUDRATE		115200	/* console baudrate = 115kbps	*/#if 0#define CONFIG_BOOTDELAY	-1	/* autoboot disabled		*/#else#define CONFIG_BOOTDELAY	3	/* autoboot after 5 seconds	*/#endif#define	CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */#define CONFIG_PREBOOT	"setenv stdout serial"#undef	CONFIG_BOOTARGS#define CONFIG_ETHADDR                00:50:C2:00:E0:70#define CONFIG_OVERWRITE_ETHADDR_ONCE 1#define CONFIG_IPADDR                 10.0.0.5#define CONFIG_SERVERIP               10.0.0.2#define CONFIG_NETMASK                255.0.0.0#define CONFIG_ROOTPATH               /opt/eldk/ppc_8xx#define CONFIG_BOOTCOMMAND            "run flash_self"#define	CONFIG_EXTRA_ENV_SETTINGS					\	"netdev=eth0\0"							\	"ramargs=setenv bootargs root=/dev/ram rw\0"			\	"nfsargs=setenv bootargs root=/dev/nfs rw "			\		"nfsroot=$(serverip):$(rootpath)\0"			\	"addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip)"	\		":$(gatewayip):$(netmask):$(hostname):$(netdev):off\0"	\	"addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\	"load=tftp 100000 /tftpboot/u-boot.bin\0"			\	"update=protect off 1:0-8;era 1:0-8;"				\		"cp.b 100000 40000000 $(filesize);"			\		"setenv filesize;saveenv\0"				\	"kernel_addr=40040000\0"					\	"ramdisk_addr=40100000\0"					\	"kernel_img=/tftpboot/uImage\0"					\	"kernel_load=tftp 200000 $(kernel_img)\0"			\	"net_nfs=run kernel_load nfsargs addip addtty;bootm\0"		\	"flash_nfs=run nfsargs addip addtty;bootm $(kernel_addr)\0"	\	"flash_self=run ramargs addip addtty;"				\		"bootm $(kernel_addr) $(ramdisk_addr)\0"#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/#undef	CFG_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/#undef	CONFIG_STATUS_LED		/* disturbs display		*/#undef	CONFIG_CAN_DRIVER		/* CAN Driver support disabled	*/#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)#define CONFIG_MAC_PARTITION#define CONFIG_DOS_PARTITION#define	CONFIG_RTC_MPC8xx		/* use internal RTC of MPC8xx	*/#ifndef CONFIG_LCD#define CONFIG_VIDEO		1	/* To enable the video initialization *//* Video related */#define CONFIG_VIDEO_LOGO			1	/* Show the logo */#define CONFIG_VIDEO_ENCODER_AD7179		1	/* Enable this encoder */#define CONFIG_VIDEO_ENCODER_AD7179_ADDR	0x2A	/* ALSB to ground */#endif/* enable I2C and select the hardware/software driver */#undef	CONFIG_HARD_I2C			/* I2C with hardware support	*/#define	CONFIG_SOFT_I2C         	/* I2C bit-banged		*/# define CFG_I2C_SPEED		50000	/* 50 kHz is supposed to work	*/# define CFG_I2C_SLAVE		0xFE#ifdef CONFIG_SOFT_I2C/* * Software (bit-bang) I2C driver configuration */#define PB_SCL		0x00000020	/* PB 26 */#define PB_SDA		0x00000010	/* PB 27 */#define I2C_INIT	(immr->im_cpm.cp_pbdir |=  PB_SCL)#define I2C_ACTIVE	(immr->im_cpm.cp_pbdir |=  PB_SDA)#define I2C_TRISTATE	(immr->im_cpm.cp_pbdir &= ~PB_SDA)#define I2C_READ	((immr->im_cpm.cp_pbdat & PB_SDA) != 0)#define I2C_SDA(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \			else    immr->im_cpm.cp_pbdat &= ~PB_SDA#define I2C_SCL(bit)	if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \			else    immr->im_cpm.cp_pbdat &= ~PB_SCL#define I2C_DELAY	udelay(1)	/* 1/4 I2C clock duration */#endif	/* CONFIG_SOFT_I2C */#define CONFIG_COMMANDS	    ( ( CONFIG_CMD_DFL	| \				CFG_CMD_DHCP	| \				CFG_CMD_I2C	| \				CFG_CMD_IDE	| \				CFG_CMD_DATE	) & \			     ~( CFG_CMD_PCMCIA  | \			        CFG_CMD_IDE	) )/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */#include <cmd_confdefs.h>/* * Miscellaneous configurable options */#define	CFG_LONGHELP			/* undef to save memory		*/#define	CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define	CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/#else#define	CFG_CBSIZE	256		/* Console I/O Buffer Size	*/#endif#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */#define	CFG_MAXARGS	16		/* max number of command args	*/#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/#define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/#define	CFG_LOAD_ADDR		0x100000	/* default load address	*/#define	CFG_HZ		1000		/* decrementer freq: 1 ms ticks	*/#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }/* * Low Level Configuration Settings * (address mappings, register initial values, etc.) * You should know what you are doing if you make changes here. *//*----------------------------------------------------------------------- * Internal Memory Mapped Register */#define CFG_IMMR		0xFFF00000/*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */#define CFG_INIT_RAM_ADDR	CFG_IMMR#define	CFG_INIT_RAM_END	0x2F00	/* End of used area in DPRAM	*/#define	CFG_GBL_DATA_SIZE	64  /* size in bytes reserved for initial data */#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)#define	CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET/*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CFG_SDRAM_BASE _must_ start at 0 */#define	CFG_SDRAM_BASE		0x00000000#define CFG_FLASH_BASE		0x40000000#define	CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/#define CFG_MONITOR_BASE	CFG_FLASH_BASE#define	CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*//* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */#define	CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux	*//*----------------------------------------------------------------------- * FLASH organization */#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/#define CFG_MAX_FLASH_SECT	71	/* max number of sectors on one chip	*//* timeout values are in ticks = ms */#define CFG_FLASH_ERASE_TOUT	(120*CFG_HZ)	/* Timeout for Flash Erase	*/#define CFG_FLASH_WRITE_TOUT	(1 * CFG_HZ)	/* Timeout for Flash Write	*/#define	CFG_ENV_IS_IN_FLASH	1#define	CFG_ENV_OFFSET		0x8000	/*   Offset   of Environment Sector	*/#define	CFG_ENV_SIZE		0x4000	/* Total Size of Environment Sector	*//* Address and size of Redundant Environment Sector	*/#define CFG_ENV_OFFSET_REDUND	(CFG_ENV_OFFSET+CFG_ENV_SIZE)#define CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)/*----------------------------------------------------------------------- * Cache Configuration */#define CFG_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CFG_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/#endif