/* * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */#include <common.h>#include <config.h>#include <mpc8xx.h>#include "fads.h"/* ------------------------------------------------------------------------- */#define	_NOT_USED_	0xFFFFFFFF#if defined(CONFIG_DRAM_50MHZ)/* 50MHz tables */static const uint dram_60ns[] ={ 0x8fffec24, 0x0fffec04, 0x0cffec04, 0x00ffec04,  0x00ffec00, 0x37ffec47, _NOT_USED_, _NOT_USED_,  0x8fffec24, 0x0fffec04, 0x08ffec04, 0x00ffec0c,  0x03ffec00, 0x00ffec44, 0x00ffcc08, 0x0cffcc44,  0x00ffec0c, 0x03ffec00, 0x00ffec44, 0x00ffcc00,  0x3fffc847, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x11bfcc47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x03afcc4c,  0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c,  0x0cafcc00, 0x33bfcc4f, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0xc0ffcc84, 0x00ffcc04, 0x07ffcc04, 0x3fffcc06,  0xffffcc85, 0xffffcc05, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };static const uint dram_70ns[] ={ 0x8fffcc24, 0x0fffcc04, 0x0cffcc04, 0x00ffcc04,  0x00ffcc00, 0x37ffcc47, _NOT_USED_, _NOT_USED_,  0x8fffcc24, 0x0fffcc04, 0x0cffcc04, 0x00ffcc04,  0x00ffcc08, 0x0cffcc44, 0x00ffec0c, 0x03ffec00,  0x00ffec44, 0x00ffcc08, 0x0cffcc44, 0x00ffec04,  0x00ffec00, 0x3fffec47, _NOT_USED_, _NOT_USED_,  0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x11bfcc47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x8fafcc24, 0x0fafcc04, 0x0cafcc00, 0x03afcc4c,  0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c,  0x0cafcc00, 0x33bfcc4f, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0xe0ffcc84, 0x00ffcc04, 0x00ffcc04, 0x0fffcc04,  0x7fffcc06, 0xffffcc85, 0xffffcc05, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };static const uint edo_60ns[] ={ 0x8ffbec24, 0x0ff3ec04, 0x0cf3ec04, 0x00f3ec04,  0x00f3ec00, 0x37f7ec47, _NOT_USED_, _NOT_USED_,  0x8fffec24, 0x0ffbec04, 0x0cf3ec04, 0x00f3ec0c,  0x0cf3ec00, 0x00f3ec4c, 0x0cf3ec00, 0x00f3ec4c,  0x0cf3ec00, 0x00f3ec44, 0x03f3ec00, 0x3ff7ec47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x11bfcc47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x03afcc4c,  0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c,  0x0cafcc00, 0x33bfcc4f, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0xc0ffcc84, 0x00ffcc04, 0x07ffcc04, 0x3fffcc06,  0xffffcc85, 0xffffcc05, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };static const uint edo_70ns[] ={ 0x8ffbcc24, 0x0ff3cc04, 0x0cf3cc04, 0x00f3cc04,  0x00f3cc00, 0x37f7cc47, _NOT_USED_, _NOT_USED_,  0x8fffcc24, 0x0ffbcc04, 0x0cf3cc04, 0x00f3cc0c,  0x03f3cc00, 0x00f3cc44, 0x00f3ec0c, 0x0cf3ec00,  0x00f3ec4c, 0x03f3ec00, 0x00f3ec44, 0x00f3cc00,  0x33f7cc47, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x11bfcc47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x8fffcc24, 0x0fefcc04, 0x0cafcc00, 0x03afcc4c,  0x0cafcc00, 0x03afcc4c, 0x0cafcc00, 0x03afcc4c,  0x0cafcc00, 0x33bfcc47, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0xe0ffcc84, 0x00ffcc04, 0x00ffcc04, 0x0fffcc04,  0x7fffcc04, 0xffffcc86, 0xffffcc05, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };#elif defined(CONFIG_DRAM_25MHZ)/* 25MHz tables */static const uint dram_60ns[] ={ 0x0fffcc04, 0x08ffcc00, 0x33ffcc47, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fffcc24, 0x0fffcc04, 0x08ffcc00, 0x03ffcc4c,  0x08ffcc00, 0x03ffcc4c, 0x08ffcc00, 0x03ffcc4c,  0x08ffcc00, 0x33ffcc47, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fafcc04, 0x08afcc00, 0x3fbfcc47, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fafcc04, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00,  0x01afcc4c, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00,  0x31bfcc43, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x80ffcc84, 0x13ffcc04, 0xffffcc87, 0xffffcc05,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };static const uint dram_70ns[] ={ 0x0fffec04, 0x08ffec04, 0x00ffec00, 0x3fffcc47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fffcc24, 0x0fffcc04, 0x08ffcc00, 0x03ffcc4c,  0x08ffcc00, 0x03ffcc4c, 0x08ffcc00, 0x03ffcc4c,  0x08ffcc00, 0x33ffcc47, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fafcc04, 0x08afcc00, 0x3fbfcc47, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fafcc04, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00,  0x01afcc4c, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00,  0x31bfcc43, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0xc0ffcc84, 0x01ffcc04, 0x7fffcc86, 0xffffcc05,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };static const uint edo_60ns[] ={ 0x0ffbcc04, 0x0cf3cc04, 0x00f3cc00, 0x33f7cc47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0ffbcc04, 0x09f3cc0c, 0x09f3cc0c, 0x09f3cc0c,  0x08f3cc00, 0x3ff7cc47, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fefcc04, 0x08afcc04, 0x00afcc00, 0x3fbfcc47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fefcc04, 0x08afcc00, 0x07afcc48, 0x08afcc48,  0x08afcc48, 0x39bfcc47, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x80ffcc84, 0x13ffcc04, 0xffffcc87, 0xffffcc05,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };static const uint edo_70ns[] ={ 0x0ffbcc04, 0x0cf3cc04, 0x00f3cc00, 0x33f7cc47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0ffbec04, 0x08f3ec04, 0x03f3ec48, 0x08f3cc00,  0x0ff3cc4c, 0x08f3cc00, 0x0ff3cc4c, 0x08f3cc00,  0x3ff7cc47, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fefcc04, 0x08afcc04, 0x00afcc00, 0x3fbfcc47,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x0fefcc04, 0x08afcc00, 0x07afcc4c, 0x08afcc00,  0x07afcc4c, 0x08afcc00, 0x07afcc4c, 0x08afcc00,  0x37bfcc47, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0xc0ffcc84, 0x01ffcc04, 0x7fffcc86, 0xffffcc05,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,  0x33ffcc07, _NOT_USED_, _NOT_USED_, _NOT_USED_ };#else#error dram not correctly defined - use CONFIG_DRAM_25MHZ or CONFIG_DRAM_50MHZ#endif/* ------------------------------------------------------------------------- *//* * Check Board Identity: */#if defined(CONFIG_FADS) && !defined(CONFIG_MPC86xADS)static void checkdboard(void){	/* get db type from BCSR 3 */	uint k = (*((uint *)BCSR3) >> 24) & 0x3f;	printf(" with db ");	switch(k) {	case 0x03 :		puts ("MPC823");		break;	case 0x20 :		puts ("MPC801");		break;	case 0x21 :		puts ("MPC850");		break;	case 0x22 :		puts ("MPC821, MPC860 / MPC860SAR / MPC860T");		break;	case 0x23 :		puts ("MPC860SAR");		break;	case 0x24 :	case 0x2A :		puts ("MPC860T");		break;	case 0x3F :		puts ("MPC850SAR");		break;	default : printf("0x%x", k);	}}#endif	/* defined(CONFIG_FADS) && !defined(CONFIG_MPC86xADS) */int checkboard (void){	/* get revision from BCSR 3 */	uint r =  (((*((uint *) BCSR3) >> 23) & 1) << 3)		| (((*((uint *) BCSR3) >> 19) & 1) << 2)		| (((*((uint *) BCSR3) >> 16) & 3));	puts ("Board: ");#ifdef CONFIG_FADS# ifdef CONFIG_MPC86xADS	puts ("MPC86xADS");# else	puts ("FADS");	checkdboard ();# endif	/* !CONFIG_MPC86xADS */	printf (" rev ");	switch (r) {	case 0x00:		puts ("ENG\n");		break;	case 0x01:		puts ("PILOT\n");		break;	default:		printf ("unknown (0x%x)\n", r);		return (-1);	}#endif	/* CONFIG_FADS */#ifdef CONFIG_ADS	printf ("ADS rev ");	switch (r) {	case 0x00:		puts ("ENG - this board sucks, check the errata, not supported\n");		return -1;	case 0x01:		puts ("PILOT - warning, read errata \n");		break;	case 0x02:		puts ("A - warning, read errata \n");		break;	case 0x03:		puts ("B \n");		break;	default:		printf ("unknown revision (0x%x)\n", r);		return (-1);	}#endif	/* CONFIG_ADS */	return 0;}/* ------------------------------------------------------------------------- */static long int dram_size (long int *base, long int maxsize){	volatile long int *addr=base;	ulong cnt, val;	ulong save[32];				/* to make test non-destructive */	unsigned char i = 0;	for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {		addr = base + cnt;		/* pointer arith! */		save[i++] = *addr;		*addr = ~cnt;	}	/* write 0 to base address */	addr = base;	save[i] = *addr;	*addr = 0;	/* check at base address */	if ((val = *addr) != 0) {		*addr = save[i];		return (0);	}	for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {		addr = base + cnt;		/* pointer arith! */		val = *addr;		*addr = save[--i];		if (val != (~cnt)) {			return (cnt * sizeof (long));		}	}	return (maxsize);}/* ------------------------------------------------------------------------- */static int _draminit (uint base, uint noMbytes, uint edo, uint delay){	volatile immap_t *immap = (immap_t *) CFG_IMMR;	volatile memctl8xx_t *memctl = &immap->im_memctl;	/* init upm */	switch (delay) {	case 70:		if (edo) {			upmconfig (UPMA, (uint *) edo_70ns,				   sizeof (edo_70ns) / sizeof (uint));		} else {			upmconfig (UPMA, (uint *) dram_70ns,				   sizeof (dram_70ns) / sizeof (uint));		}		break;	case 60:		if (edo) {			upmconfig (UPMA, (uint *) edo_60ns,				   sizeof (edo_60ns) / sizeof (uint));		} else {			upmconfig (UPMA, (uint *) dram_60ns,				   sizeof (dram_60ns) / sizeof (uint));		}		break;	default:		return -1;	}	memctl->memc_mptpr = 0x0400;	/* divide by 16 */	switch (noMbytes) {	case 4:				/* 4 Mbyte uses only CS2 */		memctl->memc_mamr = 0x13a01114;	/* PTA 0x13 AMA 010 */		memctl->memc_or2 = 0xffc00800;	/* 4M */		break;	case 8:				/* 8 Mbyte uses both CS3 and CS2 */		memctl->memc_mamr = 0x13a01114;	/* PTA 0x13 AMA 010 */		memctl->memc_or3 = 0xffc00800;	/* 4M */		memctl->memc_br3 = 0x00400081 + base;		memctl->memc_or2 = 0xffc00800;	/* 4M */		break;	case 16:			/* 16 Mbyte uses only CS2 */#ifdef CONFIG_ADS	/* XXX: why PTA=0x60 only in 16M case? - NTL */		memctl->memc_mamr = 0x60b21114;	/* PTA 0x60 AMA 011 */#else		memctl->memc_mamr = 0x13b01114;	/* PTA 0x13 AMA 011 */#endif		memctl->memc_or2 = 0xff000800;	/* 16M */		break;	case 32:			/* 32 Mbyte uses both CS3 and CS2 */		memctl->memc_mamr = 0x13b01114;	/* PTA 0x13 AMA 011 */		memctl->memc_or3 = 0xff000800;	/* 16M */		memctl->memc_br3 = 0x01000081 + base;		memctl->memc_or2 = 0xff000800;	/* 16M */		break;	default:		return -1;	}	memctl->memc_br2 = 0x81 + base;	/* use upma */	/* if no dimm is inserted, noMbytes is still detected as 8m, so	 * sanity check top and bottom of memory */	*((uint *) BCSR1) &= ~BCSR1_DRAM_EN;	/* enable dram */	/* check bytes / 2 because dram_size tests at base+bytes, which	 * is not mapped */	if (dram_size ((long *) base, noMbytes << 19) != noMbytes << 19) {		*((uint *) BCSR1) |= BCSR1_DRAM_EN;	/* disable dram */		return -1;	}	return 0;}/* ------------------------------------------------------------------------- */static void _dramdisable(void){	volatile immap_t     *immap = (immap_t *)CFG_IMMR;	volatile memctl8xx_t *memctl = &immap->im_memctl;	memctl->memc_br2 = 0x00000000;	memctl->memc_br3 = 0x00000000;	/* maybe we should turn off upma here or something */}#ifdef CONFIG_FADS/* SDRAM SUPPORT (FADS ONLY) */#if defined(CONFIG_SDRAM_100MHZ)/* ------------------------------------------------------------------------- *//* sdram table by Dan Malek                                                  *//* This has the stretched early timing so the 50 MHz * processor can make the 100 MHz timing.  This will * work at all processor speeds. */#ifdef SDRAM_ALT_INIT_SEQENCE# define SDRAM_MBMRVALUE0 0xc3802114 /* PTx=195,PTxE,AMx=0,DSx=1,A11,RLFx=1,WLFx=1,TLFx=4 */#define SDRAM_MBMRVALUE1 SDRAM_MBMRVALUE0# define SDRAM_MCRVALUE0  0x80808111   /* run upmb cs4 loop 1 addr 0x11 MRS */# define SDRAM_MCRVALUE1  SDRAM_MCRVALUE0  /* ??? why not 0x80808130? */#else# define SDRAM_MxMR_PTx         195# define UPM_MRS_ADDR           0x11# define UPM_REFRESH_ADDR       0x30    /* or 0x11 if we want to be like above? */#endif /* !SDRAM_ALT_INIT_SEQUENCE */static const uint sdram_table[] ={	/* single read. (offset 0 in upm RAM) */	0xefebfc24, 0x1f07fc24, 0xeeaefc04, 0x11adfc04,	0xefbbbc00, 0x1ff77c45, _NOT_USED_, _NOT_USED_,	/* burst read. (offset 8 in upm RAM) */	0xefebfc24, 0x1f07fc24, 0xeeaefc04, 0x10adfc04,	0xf0affc00, 0xf0affc00, 0xf1affc00, 0xefbbbc00,	0x1ff77c45,	/* precharge + MRS. (offset 11 in upm RAM) */	0xeffbbc04, 0x1ff77c34, 0xefeabc34,	0x1fb57c35, _NOT_USED_, _NOT_USED_, _NOT_USED_,	/* single write. (offset 18 in upm RAM) */	0xefebfc24, 0x1f07fc24, 0xeeaebc00, 0x01b93c04,	0x1ff77c45, _NOT_USED_, _NOT_USED_, _NOT_USED_,	/* burst write. (offset 20 in upm RAM) */	0xefebfc24, 0x1f07fc24, 0xeeaebc00, 0x10ad7c00,	0xf0affc00, 0xf0affc00, 0xe1bbbc04, 0x1ff77c45,	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,	/* refresh. (offset 30 in upm RAM) */	0xeffafc84, 0x1ff5fc04, 0xfffffc04, 0xfffffc04,	0xfffffc84, 0xfffffc07, _NOT_USED_, _NOT_USED_,	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,	/* exception. (offset 3c in upm RAM) */	0xeffffc06, 0x1ffffc07, _NOT_USED_, _NOT_USED_ };#elif defined(CONFIG_SDRAM_50MHZ)/* ------------------------------------------------------------------------- *//* sdram table stolen from the fads manual                                   *//* for chip MB811171622A-100                                                 *//* this table is for 32-50MHz operation */#ifdef SDRAM_ALT_INIT_SEQENCE# define SDRAM_MBMRVALUE0 0x80802114   /* PTx=128,PTxE,AMx=0,DSx=1,A11,RLFx=1,WLFx=1,TLFx=4 */# define SDRAM_MBMRVALUE1 0x80802118   /* PTx=128,PTxE,AMx=0,DSx=1,A11,RLFx=1,WLFx=1,TLFx=8 */# define SDRAM_MCRVALUE0  0x80808105   /* run upmb cs4 loop 1 addr 0x5 MRS */# define SDRAM_MCRVALUE1  0x80808130   /* run upmb cs4 loop 1 addr 0x30 REFRESH */# define SDRAM_MPTRVALUE  0x400#define SDRAM_MARVALUE   0x88