/*
 *  Copyright 2003 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  
 */
/* "@(#) DDK 1.10.00.23 07-02-03 (ddk-b12)" */
#include <vport.h>
#include <vportcap.h>
#include <tvp5150a.h> 
 
#include <csl_edma.h>
#include "DM643_vcapparams.h"

#ifdef PAL
#define LINE_SZ    704//352         
#define NUM_LINES  288//144  
#else
#define LINE_SZ    704//352        
#define NUM_LINES  240//144
#endif                

VPORTCAP_Params DM643_vCapParamsChan = {  
    VPORT_MODE_BT656_8BIT, /* cmode:3  */
    VPORT_FLDOP_FRAME,     /* fldOp:3  */    
  
    VPORT_SCALING_DISABLE, /* scale:1  */    
    VPORT_RESMPL_DISABLE,  /* resmpl:1 */ 
    VPORTCAP_BPK_10BIT_ZERO_EXTENDED, /*bpk10Bit:2   */

    VPORTCAP_HRST_END_HSYNC,     /*hCtRst:1  */
    VPORTCAP_VRST_END_VSYNC,/*vCtRst:1  */
    VPORTCAP_FLDD_DISABLE, /*fldDect:1 */
    VPORTCAP_EXC_DISABLE,  /*extCtl:1  */   
    VPORTCAP_FINV_DISABLE,  /* fldInv:1 */
    
    0,                     /*fldXStrt1 */
    1,                     /*fldYStrt1 */  
    0,                     /*fldXStrt2 */  
    1, //15,               /*fldYStrt2 */
    
    LINE_SZ-1,             /*fldXStop1 */
    NUM_LINES,             /*fldYStop1 */
    
    LINE_SZ-1,             /*fldXStop2 */
    NUM_LINES,             /*fldYStop2 */
    
    (LINE_SZ>>3),          /*thrld     */
    3,                     /*numFrmBufs*/
    128,                   /*alignment */
    VPORT_FLDS_MERGED,     /*mergeFlds */
    NULL,                  /*segId     */            
    EDMA_OPT_PRI_HIGH,     /*edmaPri   */
    8,                     /* irqId    */ 
};
VPORTCAP_Params DM643_vCapParamsChan2 = {  
    VPORT_MODE_BT656_8BIT, /* cmode:3  */
    VPORT_FLDOP_FRAME,     /* fldOp:3  */    
  
    VPORT_SCALING_DISABLE, /* scale:1  */    
    VPORT_RESMPL_DISABLE,  /* resmpl:1 */ 
    VPORTCAP_BPK_10BIT_ZERO_EXTENDED, /*bpk10Bit:2   */

    VPORTCAP_HRST_END_HSYNC,     /*hCtRst:1  */
    VPORTCAP_VRST_END_VSYNC,/*vCtRst:1  */
    VPORTCAP_FLDD_DISABLE, /*fldDect:1 */
    VPORTCAP_EXC_DISABLE,  /*extCtl:1  */   
    VPORTCAP_FINV_DISABLE,  /* fldInv:1 */
    
    0,                     /*fldXStrt1 */
    1,                     /*fldYStrt1 */  
    0,                     /*fldXStrt2 */  
    1, //15,               /*fldYStrt2 */
    
    LINE_SZ-1,             /*fldXStop1 */
    NUM_LINES,             /*fldYStop1 */
    
    LINE_SZ-1,             /*fldXStop2 */
    NUM_LINES,             /*fldYStop2 */
    
    (LINE_SZ>>3),          /*thrld     */
    3,                     /*numFrmBufs*/
    128,                   /*alignment */
    VPORT_FLDS_MERGED,     /*mergeFlds */
    NULL,                  /*segId     */            
    EDMA_OPT_PRI_HIGH,     /*edmaPri   */
    9,                     /* irqId    */ 
};

VPORT_PortParams DM643_vCapParamsPort = { 
    FALSE,                       /*  enableDualChan;     */ 
    VPORT_POLARITY_ACTIVE_LOW, /* vport control pin 1 polarity    */
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 2 polarity    */
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 3 polarity    */
    &TVP5150A_Fxns,
    INV,
};    

TVP5150A_ConfParams DM643_vCapParamsTVP5150A = {
  TVP5150A_AUTO,
  TVP5150A_AFMT_COMPOSITE,
  FALSE,
  INV,                   /*handleI2C */
};