?? rtmp_main.c
字號(hào):
NULL);
RTUSBMlmeUp(pAd);
}
break;
case OID_802_11_RX_ANTENNA_SELECTED:
{
NDIS_802_11_ANTENNA Antenna = *(NDIS_802_11_ANTENNA *)pData;
if (Antenna == 0)
pAd->Antenna.field.RxDefaultAntenna = 1; // ant-A
else if(Antenna == 1)
pAd->Antenna.field.RxDefaultAntenna = 2; // ant-B
else
pAd->Antenna.field.RxDefaultAntenna = 0; // diversity
pAd->PortCfg.BandState = UNKNOWN_BAND;
AsicAntennaSelect(pAd, pAd->LatchRfRegs.Channel);
DBGPRINT(RT_DEBUG_TRACE, "CMDHandler::OID_802_11_RX_ANTENNA_SELECTED (=%d)\n", Antenna);
}
break;
case OID_802_11_TX_ANTENNA_SELECTED:
{
NDIS_802_11_ANTENNA Antenna = *(NDIS_802_11_ANTENNA *)pData;
if (Antenna == 0)
pAd->Antenna.field.TxDefaultAntenna = 1; // ant-A
else if(Antenna == 1)
pAd->Antenna.field.TxDefaultAntenna = 2; // ant-B
else
pAd->Antenna.field.TxDefaultAntenna = 0; // diversity
pAd->PortCfg.BandState = UNKNOWN_BAND;
AsicAntennaSelect(pAd, pAd->LatchRfRegs.Channel);
DBGPRINT(RT_DEBUG_TRACE, "CMDHandler::OID_802_11_TX_ANTENNA_SELECTED (=%d)\n", Antenna);
}
break;
#if 0
case RT_OID_802_11_QUERY_HARDWARE_REGISTER:
NdisStatus = RTUSBQueryHardWareRegister(pAd, pData);
break;
case RT_OID_802_11_SET_HARDWARE_REGISTER:
NdisStatus = RTUSBSetHardWareRegister(pAd, pData);
break;
#endif
case RT_OID_MULTI_READ_MAC:
{
USHORT Offset = *((PUSHORT)pData);
USHORT Length = *((PUSHORT)(pData + 2));
RTUSBMultiRead(pAd, Offset, pData + 4, Length);
}
break;
case RT_OID_MULTI_WRITE_MAC:
{
USHORT Offset = *((PUSHORT)pData);
USHORT Length = *((PUSHORT)(pData + 2));
RTUSBMultiWrite(pAd, Offset, pData + 4, Length);
}
break;
case RT_OID_USB_VENDOR_EEPROM_READ:
{
USHORT Offset = *((PUSHORT)pData);
USHORT Length = *((PUSHORT)(pData + 2));
RTUSBReadEEPROM(pAd, Offset, pData + 4, Length);
}
break;
case RT_OID_USB_VENDOR_EEPROM_WRITE:
{
USHORT Offset = *((PUSHORT)pData);
#if 0
USHORT Length = *((PUSHORT)(pData + 2));
RTUSBWriteEEPROM(pAd, Offset, pData + 4, Length);
#else//F/W restricts the max EEPROM write size to 62 bytes.
USHORT Residual = *((PUSHORT)(pData + 2));
pData += 4;
while (Residual > 62)
{
RTUSBWriteEEPROM(pAd, Offset, pData, 62);
Offset += 62;
Residual -= 62;
pData += 62;
}
RTUSBWriteEEPROM(pAd, Offset, pData, Residual);
#endif
}
break;
case RT_OID_USB_VENDOR_ENTER_TESTMODE:
RTUSB_VendorRequest(pAd,
0,
DEVICE_VENDOR_REQUEST_OUT,
0x1,
0x4,
0x1,
NULL,
0);
break;
case RT_OID_USB_VENDOR_EXIT_TESTMODE:
RTUSB_VendorRequest(pAd,
0,
DEVICE_VENDOR_REQUEST_OUT,
0x1,
0x4,
0x0,
NULL,
0);
break;
case RT_OID_USB_RESET_BULK_OUT:
{
INT Index;
DBGPRINT_RAW(RT_DEBUG_ERROR, "RT_OID_USB_RESET_BULK_OUT\n");
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RESET_PIPE_IN_PROGRESS);
RTUSBRejectPendingPackets(pAd); //reject all NDIS packets waiting in TX queue
RTUSBCancelPendingBulkOutIRP(pAd);
RTUSBCleanUpDataBulkOutQueue(pAd);
NICInitializeAsic(pAd);
ReleaseAdapter(pAd, FALSE, TRUE); // unlink urb releated tx context
NICInitTransmit(pAd);
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_PIPE_IN_PROGRESS);
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET))
{
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
}
if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF))
{
for (Index = 0; Index < 4; Index++)
{
if(pAd->SendTxWaitQueue[Index].Number > 0)
{
RTMPDeQueuePacket(pAd, Index);
}
}
RTUSBKickBulkOut(pAd);
}
}
break;
case RT_OID_USB_RESET_BULK_IN:
{
int i;
DBGPRINT_RAW(RT_DEBUG_ERROR, "!!!!!RT_OID_USB_RESET_BULK_IN\n");
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RESET_PIPE_IN_PROGRESS);
NICInitializeAsic(pAd);
//RTUSBWriteMACRegister(pAd, TXRX_CSR0, 0x025eb032); // ??
for (i = 0; i < RX_RING_SIZE; i++)
{
PRX_CONTEXT pRxContext = &(pAd->RxContext[i]);
if (pRxContext->pUrb != NULL)
{
RTUSB_UNLINK_URB(pRxContext->pUrb);
usb_free_urb(pRxContext->pUrb);
pRxContext->pUrb = NULL;
}
if (pRxContext->TransferBuffer != NULL)
{
kfree(pRxContext->TransferBuffer);
pRxContext->TransferBuffer = NULL;
}
}
NICInitRecv(pAd);
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_PIPE_IN_PROGRESS);
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKIN_RESET))
{
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BULKIN_RESET);
}
if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF))
{
RTUSBBulkReceive(pAd);
RTUSBWriteMACRegister(pAd, TXRX_CSR0, 0x0276b032); // enable RX of MAC block
}
}
break;
case RT_OID_802_11_STA_CONFIG:
{
RT_802_11_STA_CONFIG *pStaConfig = (RT_802_11_STA_CONFIG *)pData;
if (pStaConfig->EnableTxBurst != pAd->PortCfg.bEnableTxBurst)
{
pAd->PortCfg.bEnableTxBurst = (pStaConfig->EnableTxBurst == 1);
//Currently Tx burst mode is only implemented in infrastructure mode.
if (INFRA_ON(pAd))
{
if (pAd->PortCfg.bEnableTxBurst)
{
//Extend slot time if any encryption method is used to give ASIC more time to do encryption/decryption during Tx burst mode.
if (pAd->PortCfg.WepStatus != Ndis802_11EncryptionDisabled)
{
// Nemo RT2573USBWriteMACRegister_old(pAd, MAC_CSR10, 0x20);
}
//Set CWmin/CWmax to 0.
// Nemo 2004 RT2573USBWriteMACRegister_old(pAd, MAC_CSR22, 0x100);
}
else
{
if (pAd->PortCfg.WepStatus != Ndis802_11EncryptionDisabled)
AsicSetSlotTime(pAd, (BOOLEAN)pAd->PortCfg.UseShortSlotTime);
// Nemo 2004 RT2573USBWriteMACRegister_old(pAd, MAC_CSR22, 0x53);
}
}
}
//pAd->PortCfg.EnableTurboRate = pStaConfig->EnableTurboRate;
pAd->PortCfg.UseBGProtection = pStaConfig->UseBGProtection;
//pAd->PortCfg.UseShortSlotTime = pStaConfig->UseShortSlotTime;
pAd->PortCfg.UseShortSlotTime = 1; // 2003-10-30 always SHORT SLOT capable
if (pAd->PortCfg.AdhocMode != pStaConfig->AdhocMode)
{
// allow dynamic change of "USE OFDM rate or not" in ADHOC mode
// if setting changed, need to reset current TX rate as well as BEACON frame format
pAd->PortCfg.AdhocMode = pStaConfig->AdhocMode;
if (pAd->PortCfg.BssType == BSS_ADHOC)
{
MlmeUpdateTxRates(pAd, FALSE);
MakeIbssBeacon(pAd);
AsicEnableIbssSync(pAd);
}
}
DBGPRINT(RT_DEBUG_TRACE, "CmdThread::RT_OID_802_11_SET_STA_CONFIG (Burst=%d,BGprot=%d,ShortSlot=%d,Adhoc=%d,Protection=%d\n",
pStaConfig->EnableTxBurst,
pStaConfig->UseBGProtection,
pStaConfig->UseShortSlotTime,
pStaConfig->AdhocMode,
pAd->PortCfg.UseBGProtection);
}
break;
case RT_OID_SET_PSM_BIT_SAVE:
MlmeSetPsmBit(pAd, PWR_SAVE);
RTMPSendNullFrame(pAd, pAd->PortCfg.TxRate);
break;
case RT_OID_SET_RADIO:
if (pAd->PortCfg.bRadio == TRUE)
{
MlmeRadioOn(pAd);
// Update extra information
pAd->ExtraInfo = EXTRA_INFO_CLEAR;
}
else
{
MlmeRadioOff(pAd);
// Update extra information
pAd->ExtraInfo = SW_RADIO_OFF;
}
break;
case RT_OID_RESET_FROM_ERROR:
case RT_OID_RESET_FROM_NDIS:
{
UINT i = 0;
RTUSBRejectPendingPackets(pAd);//reject all NDIS packets waiting in TX queue
RTUSBCleanUpDataBulkOutQueue(pAd);
MlmeSuspend(pAd, FALSE);
//Add code to access necessary registers here.
//disable Rx
RTUSBWriteMACRegister(pAd, TXRX_CSR2, 1);
//Ask our device to complete any pending bulk in IRP.
while ((atomic_read(&pAd->PendingRx) > 0) ||
(pAd->BulkOutPending[0] == TRUE) ||
(pAd->BulkOutPending[1] == TRUE) ||
(pAd->BulkOutPending[2] == TRUE) ||
(pAd->BulkOutPending[3] == TRUE))
{
if (atomic_read(&pAd->PendingRx) > 0)
{
DBGPRINT_RAW(RT_DEBUG_TRACE, "BulkIn IRP Pending!!!\n");
RTUSB_VendorRequest(pAd,
0,
DEVICE_VENDOR_REQUEST_OUT,
0x0C,
0x0,
0x0,
NULL,
0);
}
if ((pAd->BulkOutPending[0] == TRUE) ||
(pAd->BulkOutPending[1] == TRUE) ||
(pAd->BulkOutPending[2] == TRUE) ||
(pAd->BulkOutPending[3] == TRUE))
{
DBGPRINT_RAW(RT_DEBUG_TRACE, "BulkOut IRP Pending!!!\n");
if (i == 0)
{
RTUSBCancelPendingBulkOutIRP(pAd);
i++;
}
}
RTMPusecDelay(500000);
}
NICResetFromError(pAd);
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HARDWARE_ERROR))
{
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_HARDWARE_ERROR);
}
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKIN_RESET))
{
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BULKIN_RESET);
}
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET))
{
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_BULKOUT_RESET);
}
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
if ((!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) &&
(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) &&
(!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
{
MlmeResume(pAd);
RTUSBBulkReceive(pAd);
RTUSBWriteMACRegister(pAd, TXRX_CSR2, 0x7e);
}
}
break;
case RT_OID_LINK_DOWN:
DBGPRINT_RAW(RT_DEBUG_TRACE, "LinkDown(RT_OID_LINK_DOWN)\n");
LinkDown(pAd, TRUE);
break;
case RT_OID_VENDOR_WRITE_BBP:
{
UCHAR Offset, Value;
Offset = *((PUCHAR)pData);
Value = *((PUCHAR)(pData + 1));
DBGPRINT_RAW(RT_DEBUG_INFO, "offset = 0x%02x value = 0x%02x\n", Offset, Value);
RTUSBWriteBBPRegister(pAd, Offset, Value);
}
break;
case RT_OID_VENDOR_READ_BBP:
{
UCHAR Offset = *((PUCHAR)pData);
PUCHAR pValue = (PUCHAR)(pData + 1);
DBGPRINT_RAW(RT_DEBUG_INFO, "offset = 0x%02x\n", Offset);
RTUSBReadBBPRegister(pAd, Offset, pValue);
DBGPRINT_RAW(RT_DEBUG_INFO, "value = 0x%02x\n", *pValue);
}
break;
case RT_OID_VENDOR_WRITE_RF:
{
ULONG Value = *((PULONG)pData);
DBGPRINT_RAW(RT_DEBUG_INFO, "value = 0x%08x\n", Value);
RTUSBWriteRFRegister(pAd, Value);
}
break;
case RT_OID_802_11_RESET_COUNTERS:
{
UCHAR Value[22];
RTUSBMultiRead(pAd, STA_CSR0, Value, 24);
}
break;
case RT_OID_USB_VENDOR_RESET:
RTUSB_VendorRequest(pAd,
0,
DEVICE_VENDOR_REQUEST_OUT,
1,
1,
0,
NULL,
0);
break;
case RT_OID_USB_VENDOR_UNPLUG:
RTUSB_VendorRequest(pAd,
0,
DEVICE_VENDOR_REQUEST_OUT,
1,
2,
0,
NULL,
0);
break;
#if 0
case RT_OID_USB_VENDOR_SWITCH_FUNCTION:
RTUSBWriteMACRegister(pAd, MAC_CSR13, 0x2121);
RTUSBWriteMACRegister(pAd, MAC_CSR14, 0x1e1e);
RTUSBWriteMACRegister(pAd, MAC_CSR1, 3);
RTUSBWriteMACRegister(pAd, PHY_CSR4, 0xf);
RTUSB_VendorRequest(pAd,
0,
DEVICE_VENDOR_REQUEST_OUT,
1,
3,
0,
NULL,
0);
break;
#endif
case RT_OID_VENDOR_FLIP_IQ:
{
ULONG Value1, Value2;
RTUSBReadMACRegister(pAd, PHY_CSR5, &Value1);
RTUSBReadMACRegister(pAd, PHY_CSR6, &Value2);
if (*pData == 1)
{
DBGPRINT_RAW(RT_DEBUG_INFO, "I/Q Flip\n");
Value1 = Value1 | 0x0004;
Value2 = Value2 | 0x0004;
}
else
{
DBGPRINT_RAW(RT_DEBUG_INFO, "I/Q Not Flip\n");
Value1 = Value1 & 0xFFFB;
Value2 = Value2 & 0xFFFB;
}
RTUSBWriteMACRegister(pAd, PHY_CSR5, Value1);
RTUSBWriteMACRegister(pAd, PHY_CSR6, Value2);
}
break;
case RT_OID_UPDATE_TX_RATE:
MlmeUpdateTxRates(pAd, FALSE);
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