?? rt73.h
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} AIFSN_CSR_STRUC, *PAIFSN_CSR_STRUC;
#endif
//
// CWMIN_CSR: CWmin for each EDCA AC
//
#ifdef BIG_ENDIAN
typedef union _CWMIN_CSR_STRUC {
struct {
ULONG Rsv:16;
ULONG Cwmin3:4; // for AC_VO
ULONG Cwmin2:4; // for AC_VI
ULONG Cwmin1:4; // for AC_BK
ULONG Cwmin0:4; // for AC_BE
} field;
ULONG word;
} CWMIN_CSR_STRUC, *PCWMIN_CSR_STRUC;
#else
typedef union _CWMIN_CSR_STRUC {
struct {
ULONG Cwmin0:4; // for AC_BE
ULONG Cwmin1:4; // for AC_BK
ULONG Cwmin2:4; // for AC_VI
ULONG Cwmin3:4; // for AC_VO
ULONG Rsv:16;
} field;
ULONG word;
} CWMIN_CSR_STRUC, *PCWMIN_CSR_STRUC;
#endif
//
// CWMAX_CSR: CWmin for each EDCA AC
//
#ifdef BIG_ENDIAN
typedef union _CWMAX_CSR_STRUC {
struct {
ULONG Rsv:16;
ULONG Cwmax3:4; // for AC_VO
ULONG Cwmax2:4; // for AC_VI
ULONG Cwmax1:4; // for AC_BK
ULONG Cwmax0:4; // for AC_BE
} field;
ULONG word;
} CWMAX_CSR_STRUC, *PCWMAX_CSR_STRUC;
#else
typedef union _CWMAX_CSR_STRUC {
struct {
ULONG Cwmax0:4; // for AC_BE
ULONG Cwmax1:4; // for AC_BK
ULONG Cwmax2:4; // for AC_VI
ULONG Cwmax3:4; // for AC_VO
ULONG Rsv:16;
} field;
ULONG word;
} CWMAX_CSR_STRUC, *PCWMAX_CSR_STRUC;
#endif
//
// TX_CNTL_CSR: KICK/Abort TX
//
#ifdef BIG_ENDIAN
typedef union _TX_CNTL_CSR_STRUC {
struct {
ULONG Rsv1:11;
ULONG AbortTxMgmt:1;
ULONG AbortTxAc3:1; // for AC_VO
ULONG AbortTxAc2:1; // for AC_VI
ULONG AbortTxAc1:1; // for AC_BE
ULONG AbortTxAc0:1; // for AC_BK
ULONG Rsv2:11;
ULONG KickTxMgmt:1;
ULONG KickTxAc3:1; // for AC_VO
ULONG KickTxAc2:1; // for AC_VI
ULONG KickTxAc1:1; // for AC_BE
ULONG KickTxAc0:1; // for AC_BK
} field;
ULONG word;
} TX_CNTL_CSR_STRUC, *PTX_CNTL_CSR_STRUC;
#else
typedef union _TX_CNTL_CSR_STRUC {
struct {
ULONG KickTxAc0:1; // for AC_BK
ULONG KickTxAc1:1; // for AC_BE
ULONG KickTxAc2:1; // for AC_VI
ULONG KickTxAc3:1; // for AC_VO
ULONG KickTxMgmt:1;
ULONG Rsv2:11;
ULONG AbortTxAc0:1; // for AC_BK
ULONG AbortTxAc1:1; // for AC_BE
ULONG AbortTxAc2:1; // for AC_VI
ULONG AbortTxAc3:1; // for AC_VO
ULONG AbortTxMgmt:1;
ULONG Rsv1:11;
} field;
ULONG word;
} TX_CNTL_CSR_STRUC, *PTX_CNTL_CSR_STRUC;
#endif
//
// CWMAX_CSR: CWmin for each EDCA AC
//
#ifdef BIG_ENDIAN
typedef union _RX_RING_CSR_STRUC {
struct {
ULONG Rsv:13;
ULONG RxdWritebackSize:3;
ULONG :2;
ULONG RxdSize:6; // in unit of 32-bit
ULONG RxRingTotal:8;
} field;
ULONG word;
} RX_RING_CSR_STRUC, *PRX_RING_CSR_STRUC;
#else
typedef union _RX_RING_CSR_STRUC {
struct {
ULONG RxRingTotal:8;
ULONG RxdSize:6; // in unit of 32-bit
ULONG :2;
ULONG RxdWritebackSize:3;
ULONG Rsv:13;
} field;
ULONG word;
} RX_RING_CSR_STRUC, *PRX_RING_CSR_STRUC;
#endif
//
// INT_SOURCE_CSR: Interrupt source register. Write one to clear corresponding bit
//
#ifdef BIG_ENDIAN
typedef union _INT_SOURCE_CSR_STRUC {
struct {
ULONG :10;
ULONG HccaDmaDone:1;
ULONG MgmtDmaDone:1;
ULONG Ac3DmaDone:1;
ULONG Ac2DmaDone:1;
ULONG Ac1DmaDone:1;
ULONG Ac0DmaDone:1;
ULONG :11;
ULONG TxAbortDone:1;
ULONG :1;
ULONG BeaconTxDone:1;
ULONG RxDone:1;
ULONG TxDone:1;
} field;
ULONG word;
} INT_SOURCE_CSR_STRUC, *PINT_SOURCE_CSR_STRUC;
#else
typedef union _INT_SOURCE_CSR_STRUC {
struct {
ULONG TxDone:1;
ULONG RxDone:1;
ULONG BeaconTxDone:1;
ULONG :1;
ULONG TxAbortDone:1;
ULONG :11;
ULONG Ac0DmaDone:1;
ULONG Ac1DmaDone:1;
ULONG Ac2DmaDone:1;
ULONG Ac3DmaDone:1;
ULONG MgmtDmaDone:1;
ULONG HccaDmaDone:1;
ULONG :10;
} field;
ULONG word;
} INT_SOURCE_CSR_STRUC, *PINT_SOURCE_CSR_STRUC;
#endif
//
// INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF
//
#ifdef BIG_ENDIAN
typedef union _INT_MASK_CSR_STRUC {
struct {
ULONG :10;
ULONG HccaDmaDone:1;
ULONG MgmtDmaDone:1;
ULONG Ac3DmaDone:1;
ULONG Ac2DmaDone:1;
ULONG Ac1DmaDone:1;
ULONG Ac0DmaDone:1;
ULONG MitigationPeriod:8; // interrupt mitigation in unit of 32 PCI clock
ULONG bEnableMitigationPeriod:1;
ULONG :2;
ULONG TxAbortDone:1;
ULONG :1;
ULONG BeaconTxDone:1;
ULONG RxDone:1;
ULONG TxDone:1;
} field;
ULONG word;
}INT_MASK_CSR_STRUC, *PINT_MASK_CSR_STRUC;
#else
typedef union _INT_MASK_CSR_STRUC {
struct {
ULONG TxDone:1;
ULONG RxDone:1;
ULONG BeaconTxDone:1;
ULONG :1;
ULONG TxAbortDone:1;
ULONG :2;
ULONG bEnableMitigationPeriod:1;
ULONG MitigationPeriod:8; // interrupt mitigation in unit of 32 PCI clock
ULONG Ac0DmaDone:1;
ULONG Ac1DmaDone:1;
ULONG Ac2DmaDone:1;
ULONG Ac3DmaDone:1;
ULONG MgmtDmaDone:1;
ULONG HccaDmaDone:1;
ULONG :10;
} field;
ULONG word;
} INT_MASK_CSR_STRUC, *PINT_MASK_CSR_STRUC;
#endif
//
// E2PROM_CSR: EEPROM control register
//
#ifdef BIG_ENDIAN
typedef union _E2PROM_CSR_STRUC {
struct {
ULONG Rsvd:25;
ULONG LoadStatus:1; // 1:loading, 0:done
ULONG Type:1; // 1: 93C46, 0:93C66
ULONG EepromDO:1;
ULONG EepromDI:1;
ULONG EepromCS:1;
ULONG EepromSK:1;
ULONG Reload:1; // Reload EEPROM content, write one to reload, self-cleared.
} field;
ULONG word;
} E2PROM_CSR_STRUC, *PE2PROM_CSR_STRUC;
#else
typedef union _E2PROM_CSR_STRUC {
struct {
ULONG Reload:1; // Reload EEPROM content, write one to reload, self-cleared.
ULONG EepromSK:1;
ULONG EepromCS:1;
ULONG EepromDI:1;
ULONG EepromDO:1;
ULONG Type:1; // 1: 93C46, 0:93C66
ULONG LoadStatus:1; // 1:loading, 0:done
ULONG Rsvd:25;
} field;
ULONG word;
} E2PROM_CSR_STRUC, *PE2PROM_CSR_STRUC;
#endif
//
// AC_TXOP_CSR0: AC_BK/AC_BE TXOP register
//
#ifdef BIG_ENDIAN
typedef union _AC_TXOP_CSR0_STRUC {
struct {
USHORT Ac1Txop; // for AC_BE, in unit of 32us
USHORT Ac0Txop; // for AC_BK, in unit of 32us
} field;
ULONG word;
} AC_TXOP_CSR0_STRUC, *PAC_TXOP_CSR0_STRUC;
#else
typedef union _AC_TXOP_CSR0_STRUC {
struct {
USHORT Ac0Txop; // for AC_BK, in unit of 32us
USHORT Ac1Txop; // for AC_BE, in unit of 32us
} field;
ULONG word;
} AC_TXOP_CSR0_STRUC, *PAC_TXOP_CSR0_STRUC;
#endif
//
// AC_TXOP_CSR1: AC_VO/AC_VI TXOP register
//
#ifdef BIG_ENDIAN
typedef union _AC_TXOP_CSR1_STRUC {
struct {
USHORT Ac3Txop; // for AC_VO, in unit of 32us
USHORT Ac2Txop; // for AC_VI, in unit of 32us
} field;
ULONG word;
} AC_TXOP_CSR1_STRUC, *PAC_TXOP_CSR1_STRUC;
#else
typedef union _AC_TXOP_CSR1_STRUC {
struct {
USHORT Ac2Txop; // for AC_VI, in unit of 32us
USHORT Ac3Txop; // for AC_VO, in unit of 32us
} field;
ULONG word;
} AC_TXOP_CSR1_STRUC, *PAC_TXOP_CSR1_STRUC;
#endif
// -------------------------------------------------------------------
// E2PROM data layout
// -------------------------------------------------------------------
//
// EEPROM antenna select format
//
#ifdef BIG_ENDIAN
typedef union _EEPROM_ANTENNA_STRUC {
struct {
USHORT RfIcType:5; // see E2PROM document
USHORT HardwareRadioControl:1; // 1: Hardware controlled radio enabled, Read GPIO0 required.
USHORT DynamicTxAgcControl:1;
USHORT Rsv:2;
USHORT FrameType:1; // 0: DPDT , 1: SPDT , noted this bit is valid for g only.
USHORT RxDefaultAntenna:2; // default of antenna, 0: diversity, 1:antenna-A, 2:antenna-B reserved (default = 0)
USHORT TxDefaultAntenna:2; // default of antenna, 0: diversity, 1:antenna-A, 2:antenna-B reserved (default = 0)
USHORT NumOfAntenna:2; // Number of antenna
} field;
USHORT word;
} EEPROM_ANTENNA_STRUC, *PEEPROM_ANTENNA_STRUC;
#else
typedef union _EEPROM_ANTENNA_STRUC {
struct {
USHORT NumOfAntenna:2; // Number of antenna
USHORT TxDefaultAntenna:2; // default of antenna, 0: diversity, 1:antenna-A, 2:antenna-B reserved (default = 0)
USHORT RxDefaultAntenna:2; // default of antenna, 0: diversity, 1:antenna-A, 2:antenna-B reserved (default = 0)
USHORT FrameType:1; // 0: DPDT , 1: SPDT , noted this bit is valid for g only.
USHORT Rsv:2;
USHORT DynamicTxAgcControl:1;
USHORT HardwareRadioControl:1; // 1: Hardware controlled radio enabled, Read GPIO0 required.
USHORT RfIcType:5; // see E2PROM document
} field;
USHORT word;
} EEPROM_ANTENNA_STRUC, *PEEPROM_ANTENNA_STRUC;
#endif
#ifdef BIG_ENDIAN
typedef union _EEPROM_NIC_CINFIG2_STRUC {
struct {
USHORT Rsv2:11; // must be 0
USHORT ExternalLNA:1; // external LNA enable
USHORT Rsv1:4;
} field;
USHORT word;
} EEPROM_NIC_CONFIG2_STRUC, *PEEPROM_NIC_CONFIG2_STRUC;
#else
typedef union _EEPROM_NIC_CINFIG2_STRUC {
struct {
USHORT Rsv1:4;
USHORT ExternalLNA:1; // external LNA enable
USHORT Rsv2:11; // must be 0
} field;
USHORT word;
} EEPROM_NIC_CONFIG2_STRUC, *PEEPROM_NIC_CONFIG2_STRUC;
#endif
#ifdef BIG_ENDIAN
typedef union _EEPROM_TX_PWR_STRUC {
struct {
UCHAR Byte1; // High Byte
UCHAR Byte0; // Low Byte
} field;
USHORT word;
} EEPROM_TX_PWR_STRUC, *PEEPROM_TX_PWR_STRUC;
#else
typedef union _EEPROM_TX_PWR_STRUC {
struct {
UCHAR Byte0; // Low Byte
UCHAR Byte1; // High Byte
} field;
USHORT word;
} EEPROM_TX_PWR_STRUC, *PEEPROM_TX_PWR_STRUC;
#endif
#ifdef BIG_ENDIAN
typedef union _EEPROM_VERSION_STRUC {
struct {
UCHAR Version; // High Byte
UCHAR FaeReleaseNumber; // Low Byte
} field;
USHORT word;
} EEPROM_VERSION_STRUC, *PEEPROM_VERSION_STRUC;
#else
typedef union _EEPROM_VERSION_STRUC {
struct {
UCHAR FaeReleaseNumber; // Low Byte
UCHAR Version; // High Byte
} field;
USHORT word;
} EEPROM_VERSION_STRUC, *PEEPROM_VERSION_STRUC;
#endif
#ifdef BIG_ENDIAN
typedef union _EEPROM_LED_STRUC {
struct {
USHORT Rsvd:3; // Reserved
USHORT LedMode:5; // Led mode.
USHORT PolarityGPIO_4:1; // Polarity GPIO#4 setting.
USHORT PolarityGPIO_3:1; // Polarity GPIO#3 setting.
USHORT PolarityGPIO_2:1; // Polarity GPIO#2 setting.
USHORT PolarityGPIO_1:1; // Polarity GPIO#1 setting.
USHORT PolarityGPIO_0:1; // Polarity GPIO#0 setting.
USHORT PolarityACT:1; // Polarity ACT setting.
USHORT PolarityRDY_A:1; // Polarity RDY_A setting.
USHORT PolarityRDY_G:1; // Polarity RDY_G setting.
} field;
USHORT word;
} EEPROM_LED_STRUC, *PEEPROM_LED_STRUC;
#else
typedef union _EEPROM_LED_STRUC {
struct {
USHORT PolarityRDY_G:1; // Polarity RDY_G setting.
USHORT PolarityRDY_A:1; // Polarity RDY_A setting.
USHORT PolarityACT:1; // Polarity ACT setting.
USHORT PolarityGPIO_0:1; // Polarity GPIO#0 setting.
USHORT PolarityGPIO_1:1; // Polarity GPIO#1 setting.
USHORT PolarityGPIO_2:1; // Polarity GPIO#2 setting.
USHORT PolarityGPIO_3:1; // Polarity GPIO#3 setting.
USHORT PolarityGPIO_4:1; // Polarity GPIO#4 setting.
USHORT LedMode:5; // Led mode.
USHORT Rsvd:3; // Reserved
} field;
USHORT word;
} EEPROM_LED_STRUC, *PEEPROM_LED_STRUC;
#endif
#ifdef BIG_ENDIAN
typedef union _EEPROM_TXPOWER_DELTA_STRUC {
struct {
UCHAR TxPowerEnable:1;// Enable
UCHAR Type:1; // 1: plus the delta value, 0: minus the delta value
UCHAR DeltaValue:6; // Tx Power dalta value (MAX=4)
} field;
UCHAR value;
} EEPROM_TXPOWER_DELTA_STRUC, *PEEPROM_TXPOWER_DELTA_STRUC;
#else
typedef union _EEPROM_TXPOWER_DELTA_STRUC {
struct {
UCHAR DeltaValue:6; // Tx Power dalta value (MAX=4)
UCHAR Type:1; // 1: plus the delta value, 0: minus the delta value
UCHAR TxPowerEnable:1;// Enable
} field;
UCHAR value;
} EEPROM_TXPOWER_DELTA_STRUC, *PEEPROM_TXPOWER_DELTA_STRUC;
#endif
#endif // __RT73_H__
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