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Date: Wednesday, 20-Nov-96 19:28:36 GMTServer: NCSA/1.3MIME-version: 1.0Content-type: text/htmlLast-modified: Tuesday, 19-Nov-96 19:43:35 GMTContent-length: 2616<html><head><title> UCLA VLSI CAD LAB HOME PAGE</title></head><body><!WA0><img src="http://ballade.cs.ucla.edu:8080/image/vlsi.gif"><h1>UCLA VLSI CAD LAB</h1><p>This laboratory is used to investigate computer-aided designof VLSI circuits and systems. Areas include logic synthesis,technology mapping, physical design, testing, and yield enhancement for various VLSI technologies such as standard cells,gate arrays, field programmable gate arrays (FPGAs) andmulti-chip modules (MCMs). Other areas of study include astructural theory of the large-scale global optimizationswhich arise in VLSI CAD. </p><HR><h2>People of the VLSI CAD Lab</h2><UL> <LI><p><b>Faculty:</b> <!WA1><a href="http://ballade.cs.ucla.edu:8080/~cong">Jason Cong</a>, <!WA2><a href="http://ballade.cs.ucla.edu:8080/~abk">Andrew B. Kahng</a>, <!WA3><a href="http://www.cs.ucla.edu/www-mounts/lanai_www/fweb/faculty_pages/graphics_pages/potkonjak.html"> Miodrag Potkonjak</a></p><li><p><b>Post-Doctoral Scholars:</b> <!WA4><A href="http://ballade.cs.ucla.edu:8080/~khoo">Kei-Yong Khoo</a>, <!WA5><a href="http://ballade.cs.ucla.edu:8080/~dongmin">Dongmin Xu</a> </p><li><p><b>Graduate Students:</b> Darren C. Chi, <!WA6><a href="http://ballade.cs.ucla.edu:8080/~jfang">Jie Fang</a>,<!WA7><A href="http://ballade.cs.ucla.edu:8080/~helei">Lei He</a>, <!WA8><A href="http://www.cs.ucla.edu/~inki">Inki Hong</a>, <!WA9><A href="http://ballade.cs.ucla.edu:8080/~jenhsin">Jen-Hsin Huang</a>, <!WA10><A href="http://ballade.cs.ucla.edu:8080/~yeanyow">Yean-Yow Hwang</a>, <!WA11><A href="http://www.cs.ucla.edu/~darko">Darko Kirovski</a>, <!WA12><A href="http://ballade.cs.ucla.edu:8080/~kohck">Cheng-Kok Koh</a>, <!WA13><A href="http://www.cs.ucla.edu/~leec">Chunho Lee</a><!WA14><A href="http://ballade.cs.ucla.edu:8080/~pickle">Patrick Madden</a>, <!WA15><A href="http://ballade.cs.ucla.edu:8080/~peck">John Peck</a>, </p><li><p><b>Alumni:</b> <!WA16><a href="http://ballade.cs.ucla.edu:8080/~cheese">Charles Alpert</a>, <!WA17><a href="http://ballade.cs.ucla.edu:8080/~boese">Kenneth Boese</a>,<!WA18><A href="http://ballade.cs.ucla.edu:8080/~eugene">Eugene Ding</a>, <!WA19><a href="http://ballade.cs.ucla.edu:8080/~lars">Lars Hagen</a>, Chris Kwok, <!WA20><A href="http://ballade.cs.ucla.edu:8080/~ksleung">Kwok-Shing Leung</a>, Zheng Li, <!WA21><A href="http://ballade.cs.ucla.edu:8080/~huan">Huan Liu</a>,Antonios Papandreou,<!WA22><A href="http://uvacs.cs.virginia.edu/~robins/">Gabriel Robins</a>, M'Lissa Smith,Muddu Sudhakar, <!WA23><A href="http://ballade.cs.ucla.edu:8080/~tsao">Albert Chung-Wen Tsao</a></p></UL><HR><h2>VLSI CAD Lab Activities</h2><UL><LI><b><!WA24><a href="http://ballade.cs.ucla.edu:8080/~cheese/benchmarks.html">Partitioning Benchmarks in Hypergraph Format</a></b></UL><HR><h2>SIGDA Related Activities</h2><UL><LI><b><!WA25><a href="http://ballade.cs.ucla.edu:8080/~kohcc/sigdacdrom/">About SIGDA Publications on CD-ROM</a></b><LI><b><!WA26><a href="http://ballade.cs.ucla.edu:8080/~unibooth/unibooth.html">DAC 1995 SIGDA University Booth Related Information</a></b> <LI><b><!WA27><a href="http://ballade.cs.ucla.edu:8080/islped96">1996 International Symposium on Low Power Electronics and Design</a><b> </UL><HR><address>Please send comments regarding the VLSI CAD LAB Home Page to <!WA28><a href="mailto:kohck@cs.ucla.edu">kohck@cs.ucla.edu</a>. Comments regarding personal home page should be sent to the respective personal account.</p></address><HR></body></html>?? 快捷鍵說明
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