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Date: Mon, 11 Nov 1996 21:04:34 GMTServer: NCSA/1.5Content-type: text/htmlLast-modified: Sun, 15 Oct 1995 22:31:56 GMTContent-length: 3353<html><head><title>Class projects</title><head><body BGCOLOR="#BBBBB0"><h2>Class projects</h2><p><b>VLSI Systems Design <!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><a href="http://www.cs.wisc.edu/~pubs/grad-guidebook/node9.html#cs755">(CS 755)</a></b><p>Co-designed and simulated a chip implementing a directory controller for a shared-memory multiprocessor. The design was performed at gate and standard-cell level, using the M gate-level-expression language and the Autologic logic-synthesis tool suite from Mentor Graphics.<br><cite>(With<!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><a href="http://www.cs.wisc.edu/~shubu/shubu.html">Shubu Mukherjee</a>,<!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><a href="http://www.cs.wisc.edu/~subbarao/subbarao.html">Subbarao Palacharla</a>,and<!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><a href="http://www.cs.wisc.edu/~stever/stever.html">Steve Reinhardt</a>)</cite><p><b>Uniprocessor Computer Architecture <!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><a href="http://www.cs.wisc.edu/~pubs/grad-guidebook/node9.html#cs752">(CS 752)</a></b><p>Evaluated the efficacy of the Named-State Register File (NSRF) from MIT.Essentially a cache forregisters belonging to many different contexts, the NSRF was designed fora multithreaded parallel computer, replacing the fixed number of separateregister files present in a typical multithreaded architecture. In thisproject, we examined the utility of the NSRF for a <cite>uniprocessor</cite>running several unrelated contexts. Our simulation strategy involved extracting the register references from a number of runningprograms and passing the references to a cache simulator. Evaluation involved varying the number of contexts, time-slice length, NSRF size, and NSRF associativity, and determining the resultant miss ratios.<cite>(With<!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><a href="http://www.cs.wisc.edu/~jignesh/jignesh.html">Jignesh Patel</a>)</cite><p><b>Parallel Computer Architecture<!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><a href="http://www.cs.wisc.edu/~pubs/grad-guidebook/node9.html#cs757">(CS 757)</a></b><p>Measured the performance of various implementations of software synchronization methods both for shared-memory multiprocessors (locks and barriers) and for message-passing multicomputers (barriers only).Evaluation involved measuring the performance of synchronization kernelson a Sequent Symmetry multiprocessor and on an Intel iPSC/2 multicomputer.<cite>(With Po-Yung Chang)</cite><p><b>Parallel Computing and Computational Science <!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><a href="http://www.cs.wisc.edu/~pubs/grad-guidebook/node9.html#cs838">(CS 838)</a></b><p>Parallelized the NAS Parallel Benchmark APPLU, a computational-fluid-dynamics simulation code, porting it to data-parallel CM-Fortran for the CM-5 and porting it to the Sequent Symmetry. Evaluation involved runningsequential and parallel versions of the code and measuring its speedup for varying numbers of processors.<cite>(With James Puthukattukaran and Phil Stephenson)</cite><p><b>Database Design<!WA8><!WA8><!WA8><!WA8><!WA8><!WA8><!WA8><!WA8><!WA8><!WA8><!WA8><!WA8><a href="http://www.cs.wisc.edu/~pubs/grad-guidebook/node9.html#cs564">(CS 564)</a></b><p>Implemented major components of a database management system given a specification; components implemented included a paged-file layer, an unordered-file layer, an access-methods layer (B-tree implementation), and a front-end layer that interprets SQL commands.<cite>(With Olubunmi Odumade)</cite><p><!WA9><!WA9><!WA9><!WA9><!WA9><!WA9><!WA9><!WA9><!WA9><!WA9><!WA9><!WA9><a href="http://www.cs.wisc.edu/~hyder/hyder.html">Back to my home page</a><p><hr><cite> Last updated: October 15, 1995</cite><hr></body><html>?? 快捷鍵說明
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