case (FLASH_WORD_SIZE)AMD_ID_LV320T:		info->flash_id += FLASH_AM320T;		info->sector_count = 67;		info->size = 0x00400000;		break;				/* => 4 MB		*/	case (FLASH_WORD_SIZE)AMD_ID_LV640U:		info->flash_id += FLASH_AM640U;		info->sector_count = 128;		info->size = 0x00800000;		break;				/* => 8 MB		*/#if 0	/* enable when device IDs are available */	case (FLASH_WORD_SIZE)AMD_ID_LV320B:		info->flash_id += FLASH_AM320B;		info->sector_count = 67;		info->size = 0x00400000;		break;				/* => 4 MB		*/#endif	case (FLASH_WORD_SIZE)SST_ID_xF800A:		info->flash_id += FLASH_SST800A;		info->sector_count = 16;		info->size = 0x00100000;		break;				/* => 1 MB		*/	case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:		info->flash_id += FLASH_INTEL320T;		info->sector_count = 71;		info->size = 0x00400000;		break;				/* => 4 MB		*/	case (FLASH_WORD_SIZE)SST_ID_xF160A:		info->flash_id += FLASH_SST160A;		info->sector_count = 32;		info->size = 0x00200000;		break;				/* => 2 MB		*/	default:		info->flash_id = FLASH_UNKNOWN;		return (0);			/* => no or unknown flash */	}	/* base address calculation */	base=0-info->size;	/* set up sector start address table */	if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||	     (info->flash_id  == FLASH_AM040) ||	     (info->flash_id  == FLASH_AM640U)){		for (i = 0; i < info->sector_count; i++)			info->start[i] = base + (i * 0x00010000);	}	else {		if (info->flash_id & FLASH_BTYPE) {			/* set sector offsets for bottom boot block type	*/			info->start[0] = base + 0x00000000;			info->start[1] = base + 0x00004000;			info->start[2] = base + 0x00006000;			info->start[3] = base + 0x00008000;			for (i = 4; i < info->sector_count; i++)				info->start[i] = base + (i * 0x00010000) - 0x00030000;		}		else {			/* set sector offsets for top boot block type		*/			i = info->sector_count - 1;			if(info->sector_count==71) {				info->start[i--] = base + info->size - 0x00002000;				info->start[i--] = base + info->size - 0x00004000;				info->start[i--] = base + info->size - 0x00006000;				info->start[i--] = base + info->size - 0x00008000;				info->start[i--] = base + info->size - 0x0000A000;				info->start[i--] = base + info->size - 0x0000C000;				info->start[i--] = base + info->size - 0x0000E000;				for (; i >= 0; i--)					info->start[i] = base + i * 0x000010000;			}			else {				info->start[i--] = base + info->size - 0x00004000;				info->start[i--] = base + info->size - 0x00006000;				info->start[i--] = base + info->size - 0x00008000;				for (; i >= 0; i--)					info->start[i] = base + i * 0x00010000;			}		}	}	/* check for protected sectors */	for (i = 0; i < info->sector_count; i++) {		/* read sector protection at sector address, (A7 .. A0) = 0x02 */		/* D0 = 1 if protected */		addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);		if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)			info->protect[i] = 0;		else			info->protect[i] = addr2[2] & 1;	}	/*	 * Prevent writes to uninitialized FLASH.	 */	if (info->flash_id != FLASH_UNKNOWN) {		addr2 = (FLASH_WORD_SIZE *)info->start[0];		*addr2 = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */	}	return (info->size);}int wait_for_DQ7(flash_info_t *info, int sect){	ulong start, now, last;	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);	start = get_timer (0);	last  = start;	while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {			printf ("Timeout\n");			return ERR_TIMOUT;		}		/* show that we're waiting */		if ((now - last) > 1000) {  /* every second */			putc ('.');			last = now;		}	}	return ERR_OK;}int intel_wait_for_DQ7(flash_info_t *info, int sect){	ulong start, now, last, status;	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);	start = get_timer (0);	last  = start;	while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {			printf ("Timeout\n");			return ERR_TIMOUT;		}		/* show that we're waiting */		if ((now - last) > 1000) {  /* every second */			putc ('.');			last = now;		}	}	status = addr[0] & (FLASH_WORD_SIZE)0x00280028;	/* clear status register */	addr[0] = (FLASH_WORD_SIZE)0x00500050;	/* check status for block erase fail and VPP low */	return (status == 0 ? ERR_OK : ERR_NOT_ERASED);}/*----------------------------------------------------------------------- */int	flash_erase (flash_info_t *info, int s_first, int s_last){	volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);	volatile FLASH_WORD_SIZE *addr2;	int flag, prot, sect, l_sect;	int i, rcode = 0;	if ((s_first < 0) || (s_first > s_last)) {		if (info->flash_id == FLASH_UNKNOWN) {			printf ("- missing\n");		} else {			printf ("- no sectors to erase\n");		}		return 1;	}	if (info->flash_id == FLASH_UNKNOWN) {		printf ("Can't erase unknown flash type - aborted\n");		return 1;	}	prot = 0;	for (sect=s_first; sect<=s_last; ++sect) {		if (info->protect[sect]) {			prot++;		}	}	if (prot) {		printf ("- Warning: %d protected sectors will not be erased!\n",			prot);	} else {		printf ("\n");	}	l_sect = -1;	/* Disable interrupts which might cause a timeout here */	flag = disable_interrupts();	/* Start erase on unprotected sectors */	for (sect = s_first; sect<=s_last; sect++) {		if (info->protect[sect] == 0) {	/* not protected */			addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);			/*  printf("Erasing sector %p\n", addr2); */ /* CLH */			if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {				addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;				addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;				addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;				addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;				addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;				addr2[0] = (FLASH_WORD_SIZE)0x00500050;  /* block erase */				for (i=0; i<50; i++)					udelay(1000);  /* wait 1 ms */				rcode |= wait_for_DQ7(info, sect);			}			else {				if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){					addr2[0] = (FLASH_WORD_SIZE)0x00600060;  /* unlock sector */					addr2[0] = (FLASH_WORD_SIZE)0x00D000D0;  /* sector erase */					intel_wait_for_DQ7(info, sect);					addr2[0] = (FLASH_WORD_SIZE)0x00200020;  /* sector erase */					addr2[0] = (FLASH_WORD_SIZE)0x00D000D0;  /* sector erase */					rcode |= intel_wait_for_DQ7(info, sect);				}				else {					addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;					addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;					addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;					addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;					addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;					addr2[0] = (FLASH_WORD_SIZE)0x00300030;  /* sector erase */					rcode |= wait_for_DQ7(info, sect);				}			}			l_sect = sect;			/*			 * Wait for each sector to complete, it's more			 * reliable.  According to AMD Spec, you must			 * issue all erase commands within a specified			 * timeout.  This has been seen to fail, especially			 * if printf()s are included (for debug)!!			 */			/*   wait_for_DQ7(info, sect); */		}	}	/* re-enable interrupts if necessary */	if (flag)		enable_interrupts();	/* wait at least 80us - let's wait 1 ms */	udelay (1000);#if 0	/*	 * We wait for the last triggered sector	 */	if (l_sect < 0)		goto DONE;	wait_for_DQ7(info, l_sect);DONE:#endif	/* reset to read mode */	addr = (FLASH_WORD_SIZE *)info->start[0];	addr[0] = (FLASH_WORD_SIZE)0x00F000F0;	/* reset bank */	if (!rcode)	    printf (" done\n");	return rcode;}void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt){	int i;	volatile FLASH_WORD_SIZE *addr2;	long c;	c= (long)cnt;	for(i=info->sector_count-1;i>0;i--)	{		if(addr>=info->start[i])			break;	}	do {		addr2 = (FLASH_WORD_SIZE *)(info->start[i]);		addr2[0] = (FLASH_WORD_SIZE)0x00600060;  /* unlock sector setup */		addr2[0] = (FLASH_WORD_SIZE)0x00D000D0;  /* unlock sector */		intel_wait_for_DQ7(info, i);		i++;		c-=(info->start[i]-info->start[i-1]);	}while(c>0);}/*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK * 1 - write timeout * 2 - Flash not erased */int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt){	ulong cp, wp, data;	int i, l, rc;	if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){		unlock_intel_sectors(info,addr,cnt);	}	wp = (addr & ~3);	/* get lower word aligned address */	/*	 * handle unaligned start bytes	 */	if ((l = addr - wp) != 0) {		data = 0;		for (i=0, cp=wp; i<l; ++i, ++cp) {			data = (data << 8) | (*(uchar *)cp);		}		for (; i<4 && cnt>0; ++i) {			data = (data << 8) | *src++;			--cnt;			++cp;		}		for (; cnt==0 && i<4; ++i, ++cp) {			data = (data << 8) | (*(uchar *)cp);		}		if ((rc = write_word(info, wp, data)) != 0) {			return (rc);		}		wp += 4;	}	/*	 * handle word aligned part	 */	while (cnt >= 4) {		data = 0;		for (i=0; i<4; ++i) {			data = (data << 8) | *src++;		}		if ((rc = write_word(info, wp, data)) != 0) {			return (rc);		}		wp  += 4;		if((wp % 0x10000)==0)			printf("."); /* show Progress */		cnt -= 4;	}	if (cnt == 0) {		return (0);	}	/*	 * handle unaligned tail bytes	 */	data = 0;	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {		data = (data << 8) | *src++;		--cnt;	}	for (; i<4; ++i, ++cp) {		data = (data << 8) | (*(uchar *)cp);	}	rc=write_word(info, wp, data);	return rc;}/*----------------------------------------------------------------------- * Write a word to Flash, returns: * 0 - OK * 1 - write timeout * 2 - Flash not erased */static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;static int write_word (flash_info_t *info, ulong dest, ulong data){	volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);	volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;	volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;	ulong start;	int flag;	int i;	/* Check if Flash is (sufficiently) erased */	if ((*((volatile FLASH_WORD_SIZE *)dest) &		(FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {		return (2);	}	/* Disable interrupts which might cause a timeout here */	flag = disable_interrupts();	for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)	{		if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){			/* intel style writting */			dest2[i] = (FLASH_WORD_SIZE)0x00500050;			dest2[i] = (FLASH_WORD_SIZE)0x00400040;			*read_val++ = data2[i];			dest2[i] = data2[i];			if (flag)				enable_interrupts();			/* data polling for D7 */			start = get_timer (0);			udelay(10);			while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)			{				if (get_timer(start) > CFG_FLASH_WRITE_TOUT)					return (1);			}			dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */			udelay(10);			dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */			if(dest2[i]!=data2[i])				printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);		}		else {			addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;			addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;			addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;			dest2[i] = data2[i];			/* re-enable interrupts if necessary */			if (flag)				enable_interrupts();			/* data polling for D7 */			start = get_timer (0);			while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=				(data2[i] & (FLASH_WORD_SIZE)0x00800080)) {				if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {					return (1);				}			}		}	}	return (0);}/*----------------------------------------------------------------------- */