?? dm9sw.c
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/* dm9sw.c: Version 0.2 Davicom DM9013 Local Bus/PCI NIC fast Ethernet driver for Linux. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. (C)Copyright 1997-2007 DAVICOM Semiconductor,Inc. All Rights Reserved.V0.2 bill 2006/12 - enable promiscuous mode (DM9013 V2 bug) - remove early transmit (DM9013 don't have this function) - remove cont_rx_pkt_cnt - add dm9sw_switch_config() - add dm9sw_switch_reset() (when reseting switch core, some registers don't be reset. Driver must reset them if NO EEPROM. )V0.1 bill 2006/08 - creat *///#define CHECKSUM#if defined(MODVERSIONS)#include <linux/modversions.h>#endif#include <linux/config.h>#include <linux/init.h> #include <linux/delay.h>#include <linux/module.h>#include <linux/ioport.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/skbuff.h>#include <linux/version.h>#include <asm/dma.h>#include <linux/spinlock.h>#include <linux/crc32.h>#include "dm9sw.h"#define DM9013_ID 0x90130A46#define DM9003_ID 0x90030A46#define DM9KS_REGFF (IMR_SRAM_autoReturn|IMR_TX_complete|IMR_RX_coming)#define DM9KS_NO_RX_INTR (IMR_SRAM_autoReturn|IMR_TX_complete)#define DM9KS_DISINTR IMR_SRAM_autoReturn#define DM9KS_MIN_IO 0x300#define DM9KS_MAX_IO 0x370#define DM9K_IRQ 3/* timer wakeup time : 5 second */#define DMFE_TIMER_WUT jiffies+(HZ*5) #if defined(DM9KS_DEBUG)#define DMFE_DBUG(dbug_now, msg, vaule)\if (dmfe_debug||dbug_now) printk(KERN_ERR "dmfe: %s %x\n", msg, vaule)#else#define DMFE_DBUG(dbug_now, msg, vaule)\if (dbug_now) printk(KERN_ERR "dmfe: %s %x\n", msg, vaule)#endif#define wait_bit_clear(reg, bit)\wait_count=0;\while(1){\ if(!(ior(db,reg) & (1<<bit)))\ break;\ if(wait_count ==10000)\ printk("wait time out,reg0x%x\n",reg);\ wait_count++;\}#define wait_PHY_bit_clear(PHY_ID,reg, bit)\wait_count=0;\while(1){\ if(!(phy_read(db,reg,PHY_ID) & (1<<bit)))\ break;\ if(wait_count ==10000)\ printk("wait PHY time out,reg0x%x\n",reg);\ wait_count++;\}/* Structure declaration ------------------------------- */typedef struct board_info { u32 reset_counter; /* counter: RESET */ u32 reset_tx_timeout; /* RESET caused by TX Timeout */ u32 io_addr; /* Register I/O base address */ u32 io_data; /* Data I/O address */ int tx_pkt_cnt; int port_mode; u8 op_mode; /* PHY operation mode */ u8 io_mode; /* 0:word, 2:byte */ u8 device_wait_reset; /* device state */ u8 Speed; /* current speed */ u8 stop_transmit; int cont_rx_pkt_cnt; /* current number of continuos rx packets */ struct timer_list timer; struct net_device_stats stats; unsigned char srom[128]; spinlock_t lock; void (*MoveData)(struct board_info *,unsigned char *, int , int);} board_info_t;/* Global variable declaration ----------------------------- *//*static int dmfe_debug = 0;*/static struct net_device * dmfe_dev = NULL;/* For module input parameter */static int media_mode = DM9KS_AUTO;static u8 irq = DM9K_IRQ;static u32 iobase = DM9KS_MIN_IO;static int wait_count;/* function declaration ------------------------------------- */int dmfe_probe(struct net_device *);static int dmfe_open(struct net_device *);static int dmfe_start_xmit(struct sk_buff *, struct net_device *);static void dmfe_tx_done(unsigned long);static void dmfe_packet_receive(struct net_device *);static int dmfe_stop(struct net_device *);static struct net_device_stats * dmfe_get_stats(struct net_device *); static int dmfe_do_ioctl(struct net_device *, struct ifreq *, int);#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)static void dmfe_interrupt(int , void *, struct pt_regs *);#elsestatic irqreturn_t dmfe_interrupt(int , void *, struct pt_regs *);#endifstatic void dmfe_timer(unsigned long);static void dmfe_init_dm9000(struct net_device *);static unsigned long cal_CRC(unsigned char *, unsigned int, u8);static u8 ior(board_info_t *, int);static void iow(board_info_t *, int, u8);static u16 phy_read(board_info_t *, int, int);static void phy_write(board_info_t *, int, u16, int);static u16 read_srom_word(board_info_t *, int);static void dm9000_hash_table(struct net_device *);static void dmfe_timeout(struct net_device *);static void dmfe_reset(struct net_device *);static void move8(board_info_t *,unsigned char *, int , int );static void move16(board_info_t *,unsigned char *, int , int );static void move32(board_info_t *,unsigned char *, int , int );#if defined(CHECKSUM)static u8 check_rx_ready(u8);#endif#ifdef NAPIstatic int dmfe_poll (struct net_device *, int *);#endifstatic int vlan_port_vid(board_info_t *, int, u8);static int vlan_outpkt_tag(board_info_t *, int);static void vlan_group_map(board_info_t *,u8, u8);static void VLAN_SETUP(board_info_t *,int);static int dm9k_bw_control(board_info_t *, int, u8, u8, u8);static int qos_port_pri(board_info_t *, int, u8);static int qos_tos_enable(board_info_t *, int);static void QoS_SETUP(board_info_t *, int);inline u8 MAKE_MASK(int , int , int , int );//DECLARE_TASKLET(dmfe_tx_tasklet,dmfe_tx_done,0);/* DM9000 network baord routine ---------------------------- *//* Search DM9000 board, allocate space and register it*/struct net_device * __init dmfe_probe1(void){ struct net_device *dev; int err;#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) dev = init_etherdev(NULL, sizeof(struct board_info)); ether_setup(dev); #else dev= alloc_etherdev(sizeof(struct board_info));#endif if(!dev) return ERR_PTR(-ENOMEM); SET_MODULE_OWNER(dev); err = dmfe_probe(dev); if (err) goto out;#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) err = register_netdev(dev); if (err) goto out1;#endif return dev;out1: release_region(dev->base_addr,2);out:#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) kfree(dev);#else free_netdev(dev);#endif return ERR_PTR(err);}int __init dmfe_probe(struct net_device *dev){ struct board_info *db; /* Point a board information structure */ u32 id_val; u16 i, dm9000_found = FALSE; u8 MAC_addr[6]={0x00,0x11,0x22,0x33,0x44,0x55}; u8 HasEEPROM=0; DMFE_DBUG(0, "dmfe_probe()",0); /* Search All DM9000 serial NIC */ do { outb(DM9KS_VID_L, iobase); id_val = inb(iobase + 4); outb(DM9KS_VID_H, iobase); id_val |= inb(iobase + 4) << 8; outb(DM9KS_PID_L, iobase); id_val |= inb(iobase + 4) << 16; outb(DM9KS_PID_H, iobase); id_val |= inb(iobase + 4) << 24; if ((id_val == DM9013_ID)||(id_val == DM9003_ID)) { /* Request IO from system */ if(!request_region(iobase, 2, dev->name)) return -ENODEV; printk("<DM9SW> I/O: %x, VID: %x \n",iobase, id_val); dm9000_found = TRUE; /* Allocated board information structure */ memset(dev->priv, 0, sizeof(struct board_info)); db = (board_info_t *)dev->priv; dmfe_dev = dev; db->io_addr = iobase; db->io_data = iobase + 4; /* driver system function */ dev->base_addr = iobase; dev->irq = irq; dev->open = &dmfe_open; dev->hard_start_xmit = &dmfe_start_xmit; dev->watchdog_timeo = 5*HZ; dev->tx_timeout = dmfe_timeout; dev->stop = &dmfe_stop; dev->get_stats = &dmfe_get_stats; dev->set_multicast_list = &dm9000_hash_table; dev->do_ioctl = &dmfe_do_ioctl;#ifdef NAPI dev->weight = 16; dev->poll = dmfe_poll;#endif#if defined(CHECKSUM) dev->features |= NETIF_F_IP_CSUM;#endif /* Read SROM content */ for (i=0; i<64; i++) ((u16 *)db->srom)[i] = read_srom_word(db, i); /* Detect EEPROM */ for (i=0; i<6; i++) if(db->srom[i]) HasEEPROM=1; /* Set Node Address */ for (i=0; i<6; i++) { if (HasEEPROM) dev->dev_addr[i] = db->srom[i]; else dev->dev_addr[i] = MAC_addr[i]; } }//end of if() iobase += 0x10; }while(!dm9000_found && iobase <= DM9KS_MAX_IO); return dm9000_found ? 0:-ENODEV;}/* Open the interface. The interface is opened whenever "ifconfig" actives it.*/static int dmfe_open(struct net_device *dev){ board_info_t *db = (board_info_t *)dev->priv; DMFE_DBUG(0, "dmfe_open", 0); if (request_irq(dev->irq,&dmfe_interrupt,SA_SHIRQ,dev->name,dev)) return -EAGAIN; /* Initilize DM910X board */ dmfe_init_dm9000(dev); switch(db->io_mode) { case DM9KS_BYTE_MODE: db->MoveData = & move8; break; case DM9KS_WORD_MODE: db->MoveData = & move16; break; case DM9KS_DWORD_MODE: db->MoveData = & move32; break; } /* Init driver variable */ db->reset_counter = 0; db->reset_tx_timeout = 0; db->cont_rx_pkt_cnt = 0; /* set and active a timer process */ init_timer(&db->timer); db->timer.expires = DMFE_TIMER_WUT * 2; db->timer.data = (unsigned long)dev; db->timer.function = &dmfe_timer; add_timer(&db->timer); //Move to DM9000 initiallization was finished. netif_start_queue(dev); return 0;}/* Set PHY operationg mode*/static void set_PHY_mode(board_info_t *db){ int i; u16 phy_reg0 = 0x1200;/* Auto-negotiation & Restart Auto-negotiation */ u16 phy_reg4 = 0x01e1;/* Default flow control disable*/ for (i=0; i<db->port_mode; i++) /* reset PHY */ phy_write(db, 0, 0x8000, i); /* wait for PHY ready */ for (i=0; i<db->port_mode; i++) wait_PHY_bit_clear(i, 0, 15); if ( !(db->op_mode & DM9KS_AUTO) ) // op_mode didn't auto sense */ { switch(db->op_mode) { case DM9KS_10MHD: phy_reg4 = 0x21; phy_reg0 = 0x1000; break; case DM9KS_10MFD: phy_reg4 = 0x41; phy_reg0 = 0x1100; break; case DM9KS_100MHD: phy_reg4 = 0x81; phy_reg0 = 0x3000; break; case DM9KS_100MFD: phy_reg4 = 0x101; phy_reg0 = 0x3100; break; default: break; } // end of switch for(i=0; i<db->port_mode; i++) { phy_write(db, 4, phy_reg4,i); phy_write(db, 0, phy_reg0,i); } } // end of if}static void dm9sw_switch_reset(board_info_t *db){ int i; /* reset VLAN mapping table */ for (i=0xb0; i<=0xbf; i++) vlan_group_map(db, i, MAKE_MASK(1, 1, 1, 1)); /* reset Per-Port VID*/ for(i=0; i<4; i++) vlan_port_vid(db,i,1); /* reset VLAN control */ iow (db, DM9KS_VLANCR, 0); /* reset Per-Port switch control */ for(i=0; i<4; i++) { iow(db, DM9KS_PIndex, i); iow(db, 0x61, 0); iow(db, 0x66, 0); iow(db, 0x67, 0); iow(db, 0x6D, 0); iow(db, 0x6F, 0); } }static void dm9sw_switch_config(board_info_t * db){ dm9sw_switch_reset(db); /* switch control */#if 0 VLAN_SETUP(db,1); /* 0:port-base, 1:Tag-base */#endif#if 0 QoS_SETUP(db,0); /* 0:port, 1:Tag, 2:TOS */#endif#if 0 /* Bandwidth control dm9k_bw_control(db,port_no, bw_type, bit7-4, bit3-0) bw_type(reg61H.[3]): 0:control with Ingress and Egress separately 1:control with Ingress or Egress bit7-4 and bit 3-0:refer to reg66H and reg67H If bw_type=1, bit7-4 must be "0". */ dm9k_bw_control(db,1,0,0,2); dm9k_bw_control(db,0,0,2,0); #endif}/* Initilize dm9000 board*/static void dmfe_init_dm9000(struct net_device *dev){ board_info_t *db = (board_info_t *)dev->priv; DMFE_DBUG(0, "dmfe_init_dm9000()", 0); spin_lock_init(&db->lock); /* switch reset */ iow(db, DM9KS_SCR, DM9KS_SCR_ResetSwitch); wait_bit_clear(DM9KS_SCR,6); /* software reset */ iow(db, DM9KS_NCR, NCR_Reset); wait_bit_clear(DM9KS_NCR,0); /* I/O mode */ db->io_mode = ior(db, DM9KS_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */ /* DM9013 is 2 port mode or 3 port mode */ db->port_mode = (ior(db, DM9KS_MONITOR2)&(1<<6)) ? 2:3; /* Set PHY */ db->op_mode = media_mode; set_PHY_mode(db);
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