GRLIB=../..TOP=leon3mpBOARD=altera-ep1c20include $(GRLIB)/boards/$(BOARD)/Makefile.incDEVICE=$(PART)-$(PACKAGE)$(SPEED)UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucfQSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsfEFFORT=stdXSTOPT=VHDLSYNFILES=config.vhd ahbrom.vhd smc_mctrl.vhd clkgen_ep1c20board.vhd leon3mp.vhd VHDLSIMFILES=testbench.vhdSIMTOP=testbenchSDCFILE=$(GRLIB)/boards/$(BOARD)/default.sdcBITGEN=$(GRLIB)/boards/$(BOARD)/default.utCLEAN=soft-cleanLIBSKIP = apa apa3 axcelerator ec unisim ihp25 ihp25rh \	ut025crh virage rh_lib18t rh_lib18t_io2 pere05 cust1 atmel \	artisan umc18 core1553bbc core1553brm core1553brt gr1553 corePCIF \	tmtc openchip ihp gleichmannDIRSKIP = b1553 pcif leon2 leon2ft crypto satcan pci leon3ft ambatest can ddrFILESKIP = grcan.vhdinclude $(GRLIB)/software/leon3/Makefileinclude $(GRLIB)/bin/Makefile##################  project specific targets ##########################